Owner manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Combined Digital and On-Chip Analog Filter Characteristics
- Switching Specifications - Serial Audio Interface
- Digital Interface Characteristics
- Internal Power-On Reset Threshold Voltages
- DC Electrical Characteristics
- 2.1 Digital I/O Pin Characteristics
- 3. Typical Connection Diagram
- 4. Applications
- 5. Combined Digital and On-chip Analog Filter Response Plots
- Figure 10. Single-Speed Stopband Rejection
- Figure 11. Single-Speed Transition Band
- Figure 12. Single-Speed Transition Band (detail)
- Figure 13. Single-Speed Passband Ripple
- Figure 14. Double-Speed Stopband Rejection
- Figure 15. Double-Speed Transition Band
- Figure 16. Double-Speed Transition Band (detail)
- Figure 17. Double-Speed Passband Ripple
- Figure 18. Quad-Speed Stopband Rejection
- Figure 19. Quad-Speed Transition Band
- Figure 20. Quad-Speed Transition Band (detail)
- Figure 21. Quad-Speed Passband Ripple
- 6. Parameter Definitions
- 7. Package Information
- 8. Ordering Information
- 9. Revision History
DS895F2 9
CS4354
Figure 1. External Serial Clock Mode Input Timing
Figure 2. Internal Serial Clock Mode Input Timing
Figure 3. Internal Serial Clock Generation
sclkh
t
slrs
t
slrd
t
sdlrs
t
sdh
t
sclkl
t
SDIN
SCLK
LRCK
SDIN
*
LRCK
MCLK
t
mclkf
sclkr
t
sdh
t
s
dlrs
t
INTERNAL
SCLK
sclkw
t
The SCLK pulses shown are internal to the CS4354.
SDIN
LRCK
MCLK
*INTERNAL SCLK
1
N
2
N
* The SCLK pulses shown are internal to the CS4354.
N equals MCLK divided by SCLK