Owner manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Combined Digital and On-Chip Analog Filter Characteristics
- Switching Specifications - Serial Audio Interface
- Digital Interface Characteristics
- Internal Power-On Reset Threshold Voltages
- DC Electrical Characteristics
- 2.1 Digital I/O Pin Characteristics
- 3. Typical Connection Diagram
- 4. Applications
- 5. Combined Digital and On-chip Analog Filter Response Plots
- Figure 10. Single-Speed Stopband Rejection
- Figure 11. Single-Speed Transition Band
- Figure 12. Single-Speed Transition Band (detail)
- Figure 13. Single-Speed Passband Ripple
- Figure 14. Double-Speed Stopband Rejection
- Figure 15. Double-Speed Transition Band
- Figure 16. Double-Speed Transition Band (detail)
- Figure 17. Double-Speed Passband Ripple
- Figure 18. Quad-Speed Stopband Rejection
- Figure 19. Quad-Speed Transition Band
- Figure 20. Quad-Speed Transition Band (detail)
- Figure 21. Quad-Speed Passband Ripple
- 6. Parameter Definitions
- 7. Package Information
- 8. Ordering Information
- 9. Revision History

DS895F2 19
CS4354
shows the recommended power arrangements with VA and VL connected to clean supplies. It is strongly
recommended that a single ground plane be used with the GND pins connected to the common plane; this
is important because both pin 6 and pin 10 provide analog ground reference to the CS4354. Should it be
necessary to split the ground planes, the CS4354 should be placed entirely in the analog plane. In this con-
figuration, it is critical that the digital and analog ground planes be tied together with a low-impedance con-
nection, ideally a strip of copper on the printed circuit board, at a single point near the CS4354.
All signals, especially clocks, should be kept away from the FILT+ pin in order to avoid unwanted coupling
into the DAC.
4.10.1 Capacitor Placement
Decoupling capacitors should be placed as close to the device as possible, with the low-value ceramic
capacitor being the closest. To further minimize impedance, these capacitors should be located on the
same PCB layer as the device. See DC Electrical Characteristics for the voltage present across pin pairs.
This is useful for choosing appropriate capacitor voltage ratings and orientation if electrolytic capacitors
are used.
The CDB4354 evaluation board demonstrates the optimum layout and power supply arrangements.