Owner manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Combined Digital and On-Chip Analog Filter Characteristics
- Switching Specifications - Serial Audio Interface
- Digital Interface Characteristics
- Internal Power-On Reset Threshold Voltages
- DC Electrical Characteristics
- 2.1 Digital I/O Pin Characteristics
- 3. Typical Connection Diagram
- 4. Applications
- 5. Combined Digital and On-chip Analog Filter Response Plots
- Figure 10. Single-Speed Stopband Rejection
- Figure 11. Single-Speed Transition Band
- Figure 12. Single-Speed Transition Band (detail)
- Figure 13. Single-Speed Passband Ripple
- Figure 14. Double-Speed Stopband Rejection
- Figure 15. Double-Speed Transition Band
- Figure 16. Double-Speed Transition Band (detail)
- Figure 17. Double-Speed Passband Ripple
- Figure 18. Quad-Speed Stopband Rejection
- Figure 19. Quad-Speed Transition Band
- Figure 20. Quad-Speed Transition Band (detail)
- Figure 21. Quad-Speed Passband Ripple
- 6. Parameter Definitions
- 7. Package Information
- 8. Ordering Information
- 9. Revision History
DS895F2 17
CS4354
USER: Apply Power
USER: Apply MCLK
MCLK/LRCK Ratio Detection
USER: Apply LRCK
Power-On Reset State
Power-Down State
Initialization State
Power-Up State
Valid MCLK/LRCK Ratio
Outputs Muted
USER: Change MCLK/LRCK ratio
USER:
Remove MCLK
USER: Applied SCLK
SCLK mode = internal
SCLK mode = external
Normal Operation
De-emphasis
Is Selectable
Analog Output
is Generated
Normal Operation
De-emphasis
Is Disabled
USER: No SCLK
Mute State
USER: Change MCLK/LRCK ratio
Valid MCLK/LRCK Ratio
Figure 9. Initialization and Power-Down Sequence Diagram