Owner manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Combined Digital and On-Chip Analog Filter Characteristics
- Switching Specifications - Serial Audio Interface
- Digital Interface Characteristics
- Internal Power-On Reset Threshold Voltages
- DC Electrical Characteristics
- 2.1 Digital I/O Pin Characteristics
- 3. Typical Connection Diagram
- 4. Applications
- 5. Combined Digital and On-chip Analog Filter Response Plots
- Figure 10. Single-Speed Stopband Rejection
- Figure 11. Single-Speed Transition Band
- Figure 12. Single-Speed Transition Band (detail)
- Figure 13. Single-Speed Passband Ripple
- Figure 14. Double-Speed Stopband Rejection
- Figure 15. Double-Speed Transition Band
- Figure 16. Double-Speed Transition Band (detail)
- Figure 17. Double-Speed Passband Ripple
- Figure 18. Quad-Speed Stopband Rejection
- Figure 19. Quad-Speed Transition Band
- Figure 20. Quad-Speed Transition Band (detail)
- Figure 21. Quad-Speed Passband Ripple
- 6. Parameter Definitions
- 7. Package Information
- 8. Ordering Information
- 9. Revision History
DS895F2 11
CS4354
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise specified): VA = 5 V, VL = 3.3 V; GND = 0 V; SDIN = 0; all voltages with respect
to ground.
Notes: 15. Power supply current increases with increasing sample rate and increasing MCLK frequency. Typical
values are based on Fs = 48 kHz and MCLK = 12.288 MHz. Maximum values are based on highest
sample rate and highest MCLK frequency; see “Switching Specifications - Serial Audio Interface” on
page 8. Variance between speed modes is small.
16. During normal operation, SDIN = 997 Hz sine wave at 0 dBFS with load resistance R
L
= 3 k.
17. Power-down is defined as all clock and data lines held static low. All digital inputs have a weak pull-
down (approximately 50 k) which is only present during power on reset. Opposing this pull-down will
increase the power-down current.
18. Valid with the recommended capacitor values as shown in the “Typical Connection Diagram” on
page 12.
2.1 Digital I/O Pin Characteristics
Input and output levels and associated typical power supply voltage are shown in Table 2. Logic levels
should not exceed the corresponding power supply voltage.
Table 2. Digital I/O Pin Characteristics
Parameters Symbol Min Typ Max Units
Power Supplies
Power supply current (Note 15) Normal operation (Note 16)
Power-down (Note 17)
I
VA
I
VL
I
VA
I
VL
-
-
-
-
10
0.1
0.5
1
13
0.2
-
-
mA
mA
mA
A
Power dissipation (all supplies) Normal Operation (Note 16)
(Note 15) Power-Down (Note 17)
-
-
50
2.5
65
-
mW
mW
Power supply rejection ratio (Note 18) (1 kHz)
(60 Hz)
PSRR -
-
60
60
-
-
dB
dB
DC Output Voltages
Pin voltage FILT+ to GND
FLYP to FLYN
GND to -VFILT
-
-
-
3.5
4.9
4.7
-
-
-
V
V
V
Pin Name Power Supply I/O Driver Receiver
MCLK VL Input - 1.8 V - 5 V
LRCK VL Input - 1.8 V - 5 V
SCLK VL Input - 1.8 V - 5 V
SDIN VL Input - 1.8 V - 5 V