Manual

CS4341A
6 DS582F2
2. TYPICAL CONNECTION DIAGRAM
13
Serial Audio
Data
Processor
External Clock
MCLK
AGND
AOUTB
CS4341A
SDIN
LRCK
VA
AOUTA
3
4
5
14
0.1 µF
+
1µF
12
+3.3V or +5.0V
3.3 µF
3.3 µF
10 k
Ω
C
C
560
Ω
560
Ω
+
+
Micro-
Controlled
Configuration
8
6
7
SCLK
1
2
SCL/CCLK
SDA/CDIN
AD0/CS
RST
MUTEC
16
OPTIONAL
MUTE
CIRCUIT
15
1µF
0.1 µF
Audio
Output A
Audio
Output B
R
L
R
L
+
+
10 k
Ω
.1 µF
1µF
9
10
11
REF_GND
FILT+
VQ
C=
4
π
Fs(R
560)
L
R560
L
+
Figure 1. Typical Connection Diagram