4
CS4334/5/8/9
1. TYPICAL CONNECTION DIAGRAM
DEM/SCLK
6
Audio
Data
Processor
External Clock
MCLK
AGND
AOUTR
CS4334
CS4335
CS4338
CS4339
SDATA
LRCK
VA
AOUTL
3
1
2
4
7
0.1 µF
+
1µF
8
Left Audio
Output
5
Right Audio
Output
+5V
3.3 µF
10 k
C
560
+
R+560
C=
4
Fs(R 560)
R
L
3.3 µF
10 k
C
560
+
267k
R
L
L
L
267k
Figure 1. Recommended Connection Diagram
