Instruction Manual

DS882F1 55
CS42L73
4.8.6.1 I²S Format
Selecting I²S format provides the following behavior:
Up to 24 bits/sample of stereo data can be transported (see “Data Bit Depths” on page 57)
Master or Slave timing may be selected
xSP_LRCK identifies the start of a new sample word and the active stereo channel (A or B)
Data is clocked into the xSP_SDIN input using the rising edge of xSP_SCLK
Data is clocked out of the xSP_SDOUT output using the falling edge of xSP_SCLK
Bit order is MSB to LSB
Refer to section “Mono/Stereo” on page 57 for details on how the stereo nature of the I²S format impacts
the operation of the VSP.
The signaling for I²S format is shown in Figure 27.
4.8.6.2 PCM Format
If PCM format is selected:
16 bits/sample of mono data can be transported (refer to “Data Bit Depths” on page 57)
Slave timing is supported
xSP_LRCK (aka WA) identifies the start of a new sample word, acting as a Word-Aligner
Data is clocked into the xSP_SDIN input using the falling edge of xSP_SCLK
Data is clocked out of the xSP_SDOUT output using the rising edge of xSP_SCLK
Bit order may selected as MSB-to-LSB or LSB-to-MSB
The PCM Mode must be selected
PCM Format supports word bit-order reversal (LSB-to-MSB vs. MSB-to-LSB) via the XPCM_BIT_ORDER
and VPCM_BIT_ORDER bits. If enabled, the data in the location (refer to the signaling waveforms in
Figures 28 to 30) normally occupied by the data’s MSB bit is occupied by the data’s LSB bit, the location
normally occupied by the data’s MSB-1 bit is occupied by the data’s LSB+1 bit, and so on.
The X_PCM_MODE[1:0] and V_PCM_MODE[1:0] fields select how WA (xSP_LRCK) may vary in width
and location vs. the data.
Mode 0:
WA may be one or two xSP_SCLK periods wide
1st data bit is transported in the cycle following WA
No data is sampled into the CS42L73 during WA
When WA is 2 xSP_SCLK periods wide, the first data bit is output from the CS42L73 for 2 cycles,
during the last active cycle of WA and during the bit that follows WA (as usual)
Section “Mono/Stereo” on page 57 describes how the mono nature of the PCM format affects operation.
Signaling for all PCM format modes, with xPCM_BIT_ORDER = 0b (MSB-to-LSB), are shown in
Figures 28 to 30).
Figure 27. I²S Format
xSP_LRCK
xSP_SCLK
xSP_SDIN
xSP_SDOUT
MSB MSB-1 LSB+1 LSB
1/Fs
ext
Note:
x = X, A, or V
MSB MSB-1 LSB+1 LSB MSB
xSP_SCLK may
stop or continue
t
extraA =
None to some time
xSP_SCLK may
stop or continue
t
extraB =
None to some time
Left (A) Channel Right (B) Channel