User Manual

Table Of Contents
DS680F2 57
CS42L52
3/1/13
6.17 Passthrough x Volume: PASSAVOL (Address 14h) and PASSBVOL (Address 15h)
6.17.1 Passthrough x Volume
Sets the volume/gain of the signal routed from the PGA to the headphone/line output.
Notes:
1. This register is ignored when the PASSTHRUx bit (“Passthrough Analog” on page 52) is disabled.
2. The step size may deviate from 0.5 dB at settings below -40 dB. Code settings 0x95, 0xA1, 0xAD,
and 0xB9 are not guaranteed to be monotonic.
6.18 ADCx Volume Control: ADCAVOL (Address 16h) and ADCBVOL (Address 17h)
6.18.1 ADCx Volume
Sets the volume of the ADC signal out the serial data output (SDOUT).
76543210
PASSxVOL7 PASSxVOL6 PASSxVOL5 PASSxVOL4 PASSxVOL3 PASSxVOL2 PASSxVOL1 PASSxVOL0
PASSxVOL[7:0] Gain
0111 1111 12 dB
... ...
0001 1000 12 dB
... ...
0000 0001 +0.5 dB
0000 0000 0 dB
11111 1111 -0.5 dB
... ...
1000 1000 -60.0 dB
... ...
1000 0000 -60.0 dB
Step Size: 0.5 dB (approximate)
Application: “Analog In to Analog Out Passthrough” on page 31
76543210
ADCAVOL7 ADCAVOL6 ADCAVOL5 ADCAVOL4 ADCAVOL3 ADCAVOL2 ADCAVOL1 ADCAVOL0
ADCxVOL[7:0] Volume
0111 1111 24 dB
... ...
0001 1000 24 dB
... ...
0000 0000 0 dB
1111 1111 -1.0 dB
1111 1110 -2.0 dB
... ...
1010 0000 -96.0 dB
... ...
1000 0000 -96.0 dB
Step Size: 1.0 dB