User Manual

24 DS680F2
CS42L52
3/1/13
4. APPLICATIONS
4.1 Overview
4.1.1 Basic Architecture
The CS42L52 is a highly integrated, low-power, 24-bit audio CODEC comprised of a stereo analog-to-
digital converter (ADC), a stereo digital-to-analog converter (DAC), a digital PWM modulator and two full-
bridge power back-ends. The ADC and DAC are designed using multibit delta-sigma techniques - the
DAC operates at an oversampling ratio of 128Fs and the ADC operates at 64Fs, where Fs is equal to the
system sample rate.
The different clock rates maximize power savings while maintaining high performance. The PWM modu-
lator operates at a fixed frequency of 384 kHz. The power FETs are configured for either stereo full-bridge
or mono parallel full-bridge output. The CODEC operates in one of four sample rate speed modes: Quar-
ter, Half, Single, and Double. It accepts and is capable of generating serial port clocks (SCLK, LRCK) de-
rived from an input Master Clock (MCLK).
4.1.2 Line and MIC Inputs
The analog input portion of the CODEC allows selection from and configuration of multiple combinations
of stereo and microphone (MIC) sources. Eight line inputs with an option for two balanced MIC inputs, a
MIC bias output, and a Programmable Gain Amplifier (PGA) comprise the analog front-end.
4.1.3 Line and Headphone Outputs
The analog output portion of the CODEC includes a headphone amplifier capable of driving headphone
and line-level loads. An on-chip charge pump creates a negative headphone supply allowing a full-scale
output swing centered around ground. This eliminates the need for large DC-Blocking capacitors and al-
lows the amplifier to deliver more power to headphone loads at lower supply voltages.
4.1.4 Speaker Driver Outputs
The Class D power amplifiers drive 8 ohm (stereo) and 4 ohm (mono) speakers directly, without the need
for an external filter. The power MOSFETS are powered directly from a battery eliminating the efficiency
loss associated with an external regulator. Battery level monitoring and compensation maintains a steady
output as battery levels fall. NOTE: The CS42L52 should only be used in captive speaker systems where
the outputs are permanently tied to the speaker terminals.
4.1.5 Fixed Function DSP Engine
The fixed-function digital signal processing engine processes both the PCM serial input data and ADC
output data, allowing a mix between the two. Independent volume control, left/right channel swaps, mono
mixes, tone control, and limiting functions also comprise the DSP engine.
4.1.6 Beep Generator
The beep generator delivers tones at select frequencies across approximately two octave major scales.
With independent volume control, beeps may be configured to occur continuously, periodically, or at sin-
gle time intervals.
4.1.7 Power Management
Three control registers provide independent power-down control of the ADC, DAC, PGA, MIC pre-amp,
MIC bias, Headphone, and Speaker outputs, allowing operation in select applications with minimal power
consumption.