User Manual

CS4228A
12
2. TYPICAL CONNECTION DIAGRAM
+5V
Supply
+
1
µ
F 0.1
µ
F
+
1
µF0.1
µ
F
VA VD
AGND DGND
MCLK
External Clock Input
Note : MCLK Logic High is VL
All unused logic inputs
should be tied to 0V.
FL
FR
SL
SR
CENTER
SUB
FILT
150
Ω
AINL-
AINL+
AINR-
AINR+
CS4228A
ANALOG
FILTER
From Analog Input Stage
MUTEC
+3.0V to +5V
Supply
VL
+
1
µ
F0.1
µ
F
10722
15
28
27
26
25
24
23
9821
18
19
17
16
1
µ
F
Ferrite Bead
ANALOG
FILTER
ANALOG
FILTER
ANALOG
FILTER
ANALOG
FILTER
ANALOG
FILTER
* Required for 2-wire
mode only
VL
150
Ω
2.2 nf
2.2 nf
+5V
Supply
Ferrite Bead
Ferrite Bead
Digital Audio
Peripheral
or
DSP
SDIN1
SDIN2
SDIN3
SDOUT
LRCK
SCLK
50
Ω
50
Ω
33 K*
4
1
2
3
5
6
50
Ω
Microcontroller
SCL/CCLK
AD0/CS
RST
14
13
11
SDA/CDIN
12
2.2 K*
VL
22 µ F
22
µF
+
+
+
100
µ
F
100
µ F
+
+
0.1
µ
F
20
0.1
µ
F
50
Ω
50
Ω
50
Ω
VL
VL
µF
0.1
Front Left
Front Right
Surround Left
Surround Right
Center
Subwoofer
Note: AGND and DGND pins should
both be tied to a common ground plane.
Figure 6. Recommended Connection Diagram