Manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- 3. Typical Connection Diagram
- 4. Detailed Block Diagram
- 5. Applications
- 5.1 General Description
- 5.2 System Design
- 5.3 Power-Up and Power-Down
- 5.4 Volume & Muting Control Architecture
- 5.5 Volume Controls
- 5.6 Muting Controls
- 5.7 Zero-Crossing Detection
- 5.8 System Serial Control Configuration
- 5.9 I·C/SPI Serial Control Formats
- 6. CS3318 Register Quick Reference
- 7. CS3318 Register Descriptions
- 7.1 Ch 1-8 Volume - Addresses 01h - 08h
- 7.2 ¹dB Control - Address 09h
- 7.3 Mute Control - Address 0Ah
- 7.4 Device Configuration 1 - Address 0Bh (Bit 5)
- 7.5 Device Configuration 2 - Address 0Ch
- 7.6 Channel Power - Address 0Dh
- 7.7 Master Power - Address 0Eh
- 7.8 Freeze Control - Address 0Fh
- 7.9 Master1 Mask - Address 10h
- 7.10 Master1 Volume - Address 11h
- 7.11 Master1 Control - Address 12h
- 7.12 Master2 Mask - Address 13h
- 7.13 Master2 Volume - Address 14h
- 7.14 Master2 Control - Address 15h
- 7.15 Master3 Mask - Address 16h
- 7.16 Master3 Volume - Address 17h
- 7.17 Master3 Control - Address 18h
- 7.18 Group2 Chip Address 19h
- 7.19 Group1 Chip Address 1Ah
- 7.20 Individual Chip Address 1Bh
- 7.21 Chip ID - Address 1Ch
- 8. Parameter Definitions
- 9. Package Dimensions
- 10. Thermal Characteristics and Specifications
- 11. Ordering Information
- 12. Revision History

38 DS693F1
CS3318
In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB
resolution volume setting down to ½ dB resolution.
It should be noted that input values outside the CS3318’s analog range of +22 dB to -96 dB are valid;
however, the volume of each channel will be limited to the CS3318’s analog range (see “Volume Lim-
its” on page 20).
See Table 5 on page 31 for example register settings.
7.14 Master 2 Control - Address 15h
7.14.1 Master 2 Mute (Bit 1)
Default = 0
Function:
This bit controls the Master 2 mute state. When set, the Master 1 mute condition is active. When
cleared, the Master 2 mute condition is released.
See “Muting Controls” on page 21 for more information about the muting behavior of the CS3318.
7.14.2 Master 2 ¼ dB Control (Bit 0)
Default = 0
Function:
When set, ¼ dB of gain will be added to the Master 2 volume level.
See Table 6 on page 32 for an example of volume settings using the ¼ dB control.
7.15 Master 3 Mask - Address 16h
Each bit in this register serves as a Master 3 mask for its corresponding channel.
If a mask bit is set to ‘1’, the corresponding channel is unmasked, meaning that it will be affected by the
Master 3 volume and muting controls.
If a mask bit is set to ‘0’, the corresponding channel is masked, meaning that it will not be affected by the
Master 3 volume and muting controls.
This register defaults to FFh (all channels unmasked).
7.16 Master 3 Volume - Address 17h
7.16.1 Master 3 Volume Control (Bits 7:0)
Default = 11010010
Function:
The Master 3 volume control register allows the user to simultaneously gain or attenuate all un-
masked channels from +22 dB to -96 dB in 0.5 dB increments. The volume changes are implemented
76543210
Reserved Reserved Reserved Reserved Reserved Reserved M2_Mute M2_Qtr
76543210
M3_Ch8M M3_Ch7M M3_Ch6M M3_Ch5M M3_Ch4M M3_Ch3M M3_Ch2M M3_Ch1M
76543210
M3_Vol7 M3_Vol6 M3_Vol5 M3_Vol4 M3_Vol3 M3_Vol2 M3_Vol1 M3_Vol0