Manual
Table Of Contents
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- 3. Typical Connection Diagram
- 4. Detailed Block Diagram
- 5. Applications
- 5.1 General Description
- 5.2 System Design
- 5.3 Power-Up and Power-Down
- 5.4 Volume & Muting Control Architecture
- 5.5 Volume Controls
- 5.6 Muting Controls
- 5.7 Zero-Crossing Detection
- 5.8 System Serial Control Configuration
- 5.9 I·C/SPI Serial Control Formats
- 6. CS3318 Register Quick Reference
- 7. CS3318 Register Descriptions
- 7.1 Ch 1-8 Volume - Addresses 01h - 08h
- 7.2 ¹dB Control - Address 09h
- 7.3 Mute Control - Address 0Ah
- 7.4 Device Configuration 1 - Address 0Bh (Bit 5)
- 7.5 Device Configuration 2 - Address 0Ch
- 7.6 Channel Power - Address 0Dh
- 7.7 Master Power - Address 0Eh
- 7.8 Freeze Control - Address 0Fh
- 7.9 Master1 Mask - Address 10h
- 7.10 Master1 Volume - Address 11h
- 7.11 Master1 Control - Address 12h
- 7.12 Master2 Mask - Address 13h
- 7.13 Master2 Volume - Address 14h
- 7.14 Master2 Control - Address 15h
- 7.15 Master3 Mask - Address 16h
- 7.16 Master3 Volume - Address 17h
- 7.17 Master3 Control - Address 18h
- 7.18 Group2 Chip Address 19h
- 7.19 Group1 Chip Address 1Ah
- 7.20 Individual Chip Address 1Bh
- 7.21 Chip ID - Address 1Ch
- 8. Parameter Definitions
- 9. Package Dimensions
- 10. Thermal Characteristics and Specifications
- 11. Ordering Information
- 12. Revision History

36 DS693F1
CS3318
7.8 Freeze Control - Address 0Fh
7.8.1 Freeze (Bit 7)
Default = 0
Function:
When the Freeze bit is set, the Freeze function allows modifications to the control port registers with-
out changes taking effect until Freeze bit is cleared. To make multiple changes in the Control Port
registers take effect simultaneously, set the Freeze bit, make all register changes, then clear the
Freeze bit.
7.9 Master 1 Mask - Address 10h
Each bit in this register serves as a Master 1 mask for its corresponding channel.
If a mask bit is set to ‘1’, the corresponding channel is unmasked, meaning that it will be affected by the
Master 1 volume and muting controls.
If a mask bit is set to ‘0’, the corresponding channel is masked, meaning that it will not be affected by the
Master 1 volume and muting controls.
This register defaults to FFh (all channels unmasked).
7.10 Master 1 Volume - Address 11h
7.10.1 Master 1 Volume Control (Bits 7:0)
Default = 11010010
Function:
The Master 1 volume control register allows the user to simultaneously gain or attenuate all un-
masked channels in 0.5 dB increments. The volume changes are implemented as dictated by the ZC-
Mode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see “Device Configuration 2 -
Address 0Ch” on page 34).
The value of the Master 1 volume control register is mapped to the desired 0.5 dB step Master 1 vol-
ume setting by the following equation:
In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB
resolution volume setting down to ½ dB resolution.
It should be noted that input values outside the CS3318’s analog range of +22 dB to -96 dB are valid,
however, the volume of each channel will be limited to the CS3318’s analog range (see “Volume Lim-
its” on page 20).
See Table 5 on page 31 for example register settings.
76543210
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Freeze
76543210
M1_Ch8M M1_Ch7M M1_Ch6M M1_Ch5M M1_Ch4M M1_Ch3M M1_Ch2M M1_Ch1M
76543210
M1_Vol7 M1_Vol6 M1_Vol5 M1_Vol4 M1_Vol3 M1_Vol2 M1_Vol1 M1_Vol0
Register Value 2 Desired Volume Setting in dB×()210+=