Instruction Manual

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Cirrus Logic, Inc.

http://www.cirrus.com

CS1601

CS1601H

Digital PFC Controller for Electronic Ballasts

Features

 Low PFC System Cost

 Best-in-class THD

 Digital EMI Noise Shaping Reduces Conducted EMI

 Adaptive Switching Frequency Control Minimizes Boost

Inductor Size

 High Efficiency Due to Zero-current Switching

 Integrated Feedback Compensation Simplifies System

Design

 Comprehensive Safety Features

• Undervoltage Lockout (UVLO)

• Output Overvoltage Protection

• Cycle-by-cycle Current Limiting

• Input Voltage Brownout Protection

• Open/Short Loop Protection for IAC & IFB Pins

• Thermal Shutdown

 Pin Placement Similar to Traditional Boundary Mode (CRM)

Controllers

Applications

 LED Power Supply/Driver

 Fluorescent Ballasts

 HID Ballasts

Overview

The CS1601 and CS1601H are digital power factor correction

(PFC) controllers designed to deliver the lowest PFC system

cost in electronic ballast applications. The controller operates

in a variable frequency discontinuous conduction mode (VF-

DCM) with zero-current switching optimized to deliver best-in-

class THD and minimize the size and cost of magnetic

components. The CS1601 operates at switching frequencies of

up to 70kHz, and the CS1601H operates at frequencies of up

to 100kHz.

The VF-DCM control algorithm varies both duty cycle and

frequency. This spreads the EMI frequency spectrum, thus

reducing conducted EMI filtering requirements. In addition, the

maximum switching frequency is reached at the peak of the AC

input, which allows the use of a smaller, more cost-effective

boost inductor.

The feedback loop is closed through an integrated

compensation network within the controller, eliminating the

need for additional external components. Protection features

such as overvoltage, overcurrent, open and short-circuit

protection, overtemperature, and brownout protect the system

during abnormal transient conditions.

Ordering Information

See page 16.

R2 R3

C1 C2

Regulated

DC Output

Mains

BR 1

BR1

BR 1

BR1

CS1601

CS1601H

GDZCD

IFB

GND

CSIAC

VDD

STBY

rect

link

FEB’12

DS931F3

Summary of content (16 pages)

PAGE 1
CS1601 CS1601H Digital PFC Controller for Electronic Ballasts Features Overview  Low PFC System Cost The CS1601 and CS1601H are digital power factor correction (PFC) controllers designed to deliver the lowest PFC system cost in electronic ballast applications. The controller operates in a variable frequency discontinuous conduction mode (VFDCM) with zero-current switching optimized to deliver best-inclass THD and minimize the size and cost of magnetic components.
PAGE 2
CS1601 1. INTRODUCTION V DD V DD Voltage Regulator 600k STBY 2 POR VDD 15k IFB - VDD ( on) VDD ( off) VDD 7 GD 6 GND 5 ZCD VZ Iref 24k 1 + 8 ADC VDD 15k IAC Iref 24k 3 ADC tLEB CS 4 600 VCS (th) - + + t ZCB CS Threshold CS Clamp VCS (clamp ) - Zero-Crossing Detect + - V ZCD(th ) Figure 1.
PAGE 3
CS1601 2. PIN DESCRIPTION Link V oltage S ens e IFB S tandby S TBY Rec tifier V oltage S ens e IAC P FC Current S ens e CS 1 2 3 4 8 7 6 5 V DD IC S upply V oltage GD P FC Gate Driv er GND Ground ZCD P FC Zero-c urrent Detec t 8-lead S OIC Figure 2. CS1601 Pin Assignments Pin Name Pin # I/O IFB 1 IN Link Voltage Sense — A current proportional to the output link voltage of the PFC is input here. The current is measured with an ADC. STBY 2 IN Standby — A voltage below 0.
PAGE 4
CS1601 3. CHARACTERISTICS AND SPECIFICATIONS 3.1 Electrical Characteristics Minimum/Maximum characteristics conditions: Typical characteristics conditions: TA = 25°C, VDD = 13V, GND = 0V TJ = -40° to +125 °C, VDD = 10V to 15V, GND = 0V All voltages are measured with respect to GND. Unless otherwise specified, all currents are positive when flowing into the IC. Parameter Condition Symbol Min Typ Max Unit After Turn-on VDD 7.9 - 17.0 V Turn-on Threshold Voltage VDD Increasing VDD(on) 9.
PAGE 5
CS1601 Parameter Condition Symbol Min Typ Max Unit VCS(clamp) - 1.0 - V Overcurrent Protection (OCP) Current Sense Reference Clamp Threshold on Current Sense VCS(th) - 0.5 - V Leading Edge Blanking tLEB - 300 - ns Delay to Output tCS - 60 350 ns Brownout Protection (BP) Input Brownout Protection Threshold Gate Drive Turns Off IBP(lower) - 31.6 - A Input Brownout Recovery Threshold Gate Drive Turns On IBP(upper) - 39.
PAGE 6
CS1601 3.2 Absolute Maximum Ratings Characteristics conditions: All voltages are measured with respect to GND. Pin Symbol 8 VDD 1,2,3,4,5 - 1,2,3,4,5 - 7 VGD 7 Value Unit 19 V Analog Input Maximum Voltage -0.5 to (VDD +0.5) V Analog Input Maximum Current 50 mA Gate Drive Output Voltage -0.3 to (VDD +0.3) V IGD Gate Drive Output Current -1.0 / +0.
PAGE 7
CS1601 4. TYPICAL ELECTRICAL PERFORMANCE 2 3.5 Supply Current (mA) 3.0 2.5 IDD (mA) fSW(max) = 100kHz 1.8 2.0 fSW(max) = 100kHz 1.5 fSW(max) = 70kHz 1.0 Rising Falling 0.5 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 2 4 6 8 10 12 14 16 Start-up 0 0.0 0 fSW(max) = 70kHz Operating 18 -50 0 50 VDD (V) 100 150 Temperature (oC) Figure 3. Supply Current vs. Supply Voltage Figure 4. Supply Current (ISB, IST, IDD) vs. Temp 11 3 10.5 Turn On 2 VDD (V) UVLO Hysteresis 10 1 9.5 9 8.
PAGE 8
CS1601 19 14 IDD = 20 mA 12 18.5 10 VZ (V) Zout (Ohm) Source 8 6 VDD = 13 V Isource = 100 mA Isink = 200 mA Sink 4 18 17.5 2 17 0 -60 -40 -20 0 20 40 60 80 100 120 Gate Resistor (ROH, ROL) Temp (oC) 140 0 50 Temperature 100 150 (oC) Figure 9. VDD Zener Voltage vs. Temp Figure 8. Gate Resistance (ROH, ROL) vs. Temp Vlink (Normalized at 25OC) -50 106% OVP 104% 102% 100% Normal 98% 96% -50 0 50 Temperature (OC) 100 150 Figure 10. OVP vs.
PAGE 9
CS1601 5. GENERAL DESCRIPTION One key feature of the CS1601 is its operating frequency profile. Figure 10 illustrates how the frequency varies over a half cycle of the line voltage in steady-state operation. When power is first applied to the CS1601, it examines the line voltage and adapts its operating frequency to the line voltage, as shown in Figure 10. The operating frequency is varied from the peak to the trough of the AC input.
PAGE 10
CS1601 5.2 Startup vs. Normal Operation Mode 5.4 Output Power and PFC Boost Inductor The CS1601 has two discrete operation modes: startup and normal. Startup mode will be activated when Vlink is less than 90% of nominal value, VO(startup), and remains active until Vlink reaches 100% of nominal value, as shown in Figure 14. Startup mode is activated during initial system power-up.
PAGE 11
CS1601 5.5 PFC Output Capacitor 5.7 Valley Switching The value of the PFC output capacitor needs to be selected based upon voltage ripple and hold-up requirements. To ensure system stability with the digital controller, the recommended value of the capacitor is within the range of 0.25F/watt to 0.5F/watt with a Vlink voltage of 460V. The zero-current detection (ZCD) pin is monitored for demagnetization in the auxiliary winding of the boost inductor (L B ).
PAGE 12
CS1601 table below depicts approximate values for R3 and R4 for a range of boost-to-auxiliary inductor turns ratio, N. N 9 10 11 12 13 14 15 ~R3 46k 42k 37.5k 35.5k 32k 29.5k 27.5k The overpower protection may activate prior to brownout protection, depending on the load. TBrownout ~R4 1.75k 1.75k 1.75k 1.75k 1.75k 1.75k 1.75k Brownout Thresholds Upper Lower Start Timer Enter Standby Start Timer Table 1. Aux Inductor Turns Ratio vs.
PAGE 13
CS1601 5.11 Overpower Protection 5.13 Internal Overtemperature Protection The CS1601 incorporates an internal overpower protection (OPP) algorithm that provides protection from overload conditions. This algorithm uses the condition that output power is a function of the boost inductor (see section 5.4 Output Power and PFC Boost Inductor on page 10). An internal thermal sensor triggers a shutdown when the temperature exceeds 135°C (nominal) on the silicon.
PAGE 14
CS1601 5.15 Eq. # Summary of Equations Equation Variables/Recommended Values Output Power (page 10) 1 2 V link –  V in  min   2  Po =      V in  min    --------------------------------------------------------2  f max  L B  V link Po Rated output power of the system.  Efficiency of the boost converter (estimated as 100% by the PFC algorithm).
PAGE 15
CS1601 6. PACKAGE DRAWING SOIC-8 NARROW (150 MIL BODY) PACKAGE DRAWING Dimension A A1 b c D E E1 e L Θ aaa bbb ddd MIN -0.10 0.31 0.10 0.40 0° MILLIMETERS NOM ----4.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC --- MAX 1.75 0.25 0.51 0.25 MIN -0.004 0.012 0.004 1.27 8° 0.016 0° 0.10 0.25 0.25 INCHES NOM ----0.193 BSC 0.236 BSC 0.154 BSC 0.050 BSC --- MAX 0.069 0.010 0.020 0.010 0.050 8° 0.004 0.010 0.010 Notes: 1. Controlling dimensions are in millimeters 2. Dimensions and Tolerances per ASME Y14.5M 3.
PAGE 16
CS1601 7. ORDERING INFORMATION Part # Temperature Range Package Description CS1601-FSZ -40°C to +125°C 8-lead SOIC, Lead (Pb) Free CS1601H-FSZ -40°C to +125°C 8-lead SOIC, Lead (Pb) Free 8. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number Peak Reflow Temp MSL Ratinga Max Floor Lifeb CS1601-FSZ 260°C 2 365 Days CS1601H-FSZ 260°C 2 365 Days a. MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. b. Stored at 30°C, 60% relative humidity. 9.