Manual

CRD5378
DS639RD2 19
2.2.5.1 VREF_MOD
The voltage reference output is provided to the CS5373A ∆Σ modulator and test DAC through a low-pass
RC filter. By filtering the voltage reference to the device, high-frequency noise is eliminated and any sig-
nal-dependent sampling of VREF is isolated. The voltage reference signal is routed as a separate differ-
ential pair from the large RC filter capacitor to control the sensitive VREF source-return currents and keep
them out of the ground plane. In addition to the RC filter function, the 68 uF filter capacitor provides a large
charge-well to help settle voltage reference sampling transients.
2.3 Digital Hardware
2.3.1 Digital Filter
The CS5378 digital filter performs filtering and decimation of the ∆Σ bit stream from the CS5373A modu-
lator. It also creates a ∆Σ bit stream output to create analog test signals in the CS5373A test DAC.
The CS5378 requires several control signal inputs from the external system.
Configuration and data collection are through the SPI port.
Modulator ∆Σ data is input through the modulator interface, and test DAC ∆Σ data is generated by the test
bit stream generator.
Control Signals Description
RESETz Reset input, active low
BOOT Microcontroller / EEPROM boot mode select
TIMEB Time Break input, rising edge triggered
CLK Master clock input, 32.768 MHz
SYNC Master synchronization input, rising edge triggered
SPI1 Signals Description
DRDYz Data ready output, active low
SCK Serial clock
MISO Master in / slave out serial data
MOSI Master out /slave in serial data
SS: EECSz Serial chip select, active low
Modulator Signals Description
MCLK Modulator clock output
MSYNC Modulator synchronization output
MDATA Modulator delta-sigma data input
MFLAG Modulator over-range flag input
TBSDATA Test DAC delta-sigma data output