CDB5378 Single-channel Seismic Evaluation System Features General Description z The CDB5378 board is used to evaluate the functionality and performance of the Cirrus Logic single-channel seismic chip set. Data sheets for the CS3301A, CS5373A, and CS5378 devices should be consulted when using the CDB5378 evaluation board.
CDB5378 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied).
CDB5378 TABLE OF CONTENTS 1. INITIAL SETUP ......................................................................................................................... 5 1.1 Kit Contents ....................................................................................................................... 5 1.2 Hardware Setup ................................................................................................................. 5 1.2.1 Default Jumper Settings .........................................
CDB5378 4. 5. 6. 7. 4 3.4.3 Plot Enable .......................................................................................................... 47 3.4.4 Cursor ................................................................................................................. 47 3.4.5 Zoom ................................................................................................................... 48 3.4.6 Refresh .....................................................................................
CDB5378 LIST OF FIGURES Figure 1. CDB5378 Block Diagram ............................................................................................... 13 Figure 2. Quad Group Routing of RC Filter Components ............................................................. 18 Figure 3. CPLD Default Signal Assignments ................................................................................ 24 Figure 4. Differential Pair Routing .............................................................................
CDB5378 LIST OF TABLES Table 1. Analog Input Default Jumper Settings............................................................................... 6 Table 2. RESET, SPI, SYNC Default Jumper Settings ................................................................... 6 Table 3. VREF, Power Supplies Default Jumper Settings .............................................................. 7 Table 4. Clock Default Jumper Settings ....................................................................................
CDB5378 1. INITIAL SETUP 1.1 Kit Contents The CDB5378 evaluation kit includes: • CDB5378 Evaluation Board • USB Cable (A to B) • Software Download Information Card The following are required to operate CDB5378, and are not included: • Bipolar Power Supply with Banana Jack Outputs (+/-12 V @ 100 mA) • Banana Jack Cables (4x) • PC Running Windows 2000 or XP with an Available USB Port • Internet Access to Download the Evaluation Software 1.
CDB5378 1.2.1 Default Jumper Settings J27 Analog Input Selections DAC_OUT+ 1 * * 2 INA+ DAC_OUT- 3 * * 4 INA- DAC_OUT- 5 ---------- 6 INB- DAC_OUT+ 7 ---------- 8 INB+ DAC_BUF+ 9 ---------- 10 INA+ DAC_BUF- 11 ---------- 12 INA- DAC_BUF- 13 * * 14 INB- DAC_BUF+ 15 * * 16 INB+ BNC_IN+ 17 * * 18 INA+ BNC_IN- 19 * * 20 INA- BNC_IN- 21 * * 22 INB- BNC_IN+ 23 * * 24 INB+ Table 1.
CDB5378 J19 Voltage Reference Jumpers VREF- 4 ---------- 3 VREF+ 2 ---------- 1 J10 J11 VA- Voltage Selection VA+ Voltage Selection -2.5VA 1 ---------- 2 +2.5VA 1 ---------- 2 GND 3 * * 4 +5VA 3 * * 4 EXT_VA- 5 * * 6 EXT_VA+ 5 * * 6 J12 J13 VD Input Voltage Source VCORE Input Voltage Source EXT_VA+ 1 * * 2 EXT_VA+ 1 * * 2 EXT_VD 3 ---------- 4 EXT_VD 3 ---------- 4 J22 J21 VD Voltage Selection VCORE Voltage Selection +3.
CDB5378 J15 J14 I2C Data I2C Clock 1 ---------- 2 SCL+ SDA- 3 ---------- 4 SDA 5 * * 6 GND 7 * * 8 SDA+ 1 ---------- 2 SCL- 3 ---------- 4 SCL 5 * * 6 GND 7 * * 8 J23 I2C Clock Driver Enable GND 1 ---------- 2 VD 3 * * 4 J24 J25 Clock Source Sync Source CLK+ 1 ---------- 2 SYNC+ 1 ---------- 2 CLK- 3 ---------- 4 SYNC- 3 ---------- 4 CLK_I/O 5 * * 6 SYNC_I/O 5 * * 6 GND 7 * * 8 GND 7 * * 8 J33 J34 Clock Driver Enable
CDB5378 1.3 1.3.1 Software Setup PC Requirements The PC hardware requirements for the Cirrus Seismic Evaluation system are: • Windows XP, Windows 2000, Windows NT • Intel Pentium 600MHz or higher microprocessor • VGA resolution or higher video card • Minimum 64MB RAM • Minimum 40MB free hard drive space 1.3.
CDB5378 CDB5378 as an unknown USB device. • If prompted for a USB driver, skip to the next step. If not, using Windows Hardware Device Manager go to the properties of the unknown USB API device and select “Update Driver”. • Select “Install from a list or specific location”, then select “Include this location in the search” and then browse to “C:\Program Files\Cirrus Seismic Evaluation\Driver\”. The PC will recognize and install the USBXpress device driver.
CDB5378 1.4 Self-testing CDB5378 Noise and distortion self-tests can be performed once hardware and software setup are complete. First, initialize the CDB5378 evaluation system: • Launch the evaluation software and apply power to CDB5378. • Click ‘OK’ on the About panel to get to the Setup panel. • On the Setup panel, select Open Target on the USB Port sub-panel. • When connected, the Board Name and MCU code version will be displayed. 1.4.
CDB5378 • Once the Setup panel is set, select Configure on the Digital Filter sub-panel. • After digital filter configuration is complete, click Capture to collect a data record. • Once the data record is collected, the Analysis panel is automatically displayed. • Select Noise FFT from the Test Select control to display the calculated noise statistics. • Verify the noise performance (S/N) is 124 dB or better. 1.4.
CDB5378 2. HARDWARE DESCRIPTION 2.1 Block Diagram Figure 1.
CDB5378 2.2 Analog Hardware 2.2.1 2.2.1.1 Analog Inputs External Inputs - INA, INB, BNC External signals into CDB5378 are from two major classes of sensors, moving coil geophones and piezoelectric hydrophones. Geophones are low-impedance sensors optimized to measure vibrations in land applications. Hydrophones are high-impedance sensors optimized to measure pressure in marine applications. Other sensors for earthquake monitoring and military applications are considered as geophones for this datasheet.
CDB5378 By default, CDB5378 is populated with passive RC filter components on the INA inputs, and no filter components on the INB inputs (though the component footprints are present on the INB inputs). Because the CS5373A precision output will not tolerate significant loading, the DAC_OUT signal should only jumper to the INB inputs on CDB5378. The CS5373A buffered outputs are less sensitive to the RC filter load and DAC_BUF can be jumpered to either the INA or INB inputs. 2.2.1.
CDB5378 Land Common Mode Filter Specification Common Mode Capacitance Common Mode Resistance Common Mode -3 dB Corner @ 6 dB/octave Value 10 nF + 10% 200 Ω 80 kHz + 10% Land Differential Filter Specification Differential Capacitance Differential Resistance Differential -3 dB Corner @ 6 dB/octave Value 10 nF + 10% 200 Ω + 200 Ω = 400 Ω 40 kHz + 10% Marine Common Mode Filter Specification Hydrophone Group Capacitance Common Mode Resistance -3 dB Corner @ 6 dB/octave Value 128 nF + 10% 825 kΩ || 825 kΩ =
CDB5378 2.2.2 Differential Amplifiers The CS3301A/02A amplifiers act as a low-noise gain stage for internal or external differential analog signals. Analog Signals INA INB OUTR, OUTF GUARD Description Sensor analog input Test DAC analog input Analog rough / fine outputs CS3302A guard output (jumper selection) Digital Signals MUX[0..1] GAIN[0..2] PWDN CLK Description Input mux selection Gain range selection Power down mode enable CS3301A clock input (jumper selection) 2.2.2.1 MCLK Input vs.
CDB5378 The CS3301A/02A amplifier outputs require a differential anti-alias RC filter, which is created by connecting external 680 Ω series resistors with 20 nF of high-linearity differential capacitance (2x 10 nF C0G) between each half of the rough and fine signals. INR+ INF+ INFINR- INR+ INF+ INFINR- Figure 2. Quad Group Routing of RC Filter Components 2.2.3 Delta-Sigma Modulator The CS5373A ∆Σ modulator performs the A/D function for the differential analog signal from the CS3301A/02A amplifier.
CDB5378 2.2.4 Delta-Sigma Test DAC The CS5373A ∆Σ DAC creates differential analog signals for system tests. Multiple test modes are available and their use is described in the CS5373A data sheet. Analog Signals OUT BUF CAP VREF Description Precision differential analog output Buffered differential analog output Capacitor connection for internal anti-alias filter Voltage reference analog inputs Digital Signals TDATA MCLK MSYNC MODE[0..2] ATT[0..
CDB5378 2.2.5 Voltage Reference A voltage reference on CDB5378 creates a precision voltage from the regulated analog supplies for the CS5373A VREF input. Because the voltage reference output is generated relative to the negative analog power supply, VREF+ is near GND potential for bipolar power supplies.
CDB5378 Configuration and data collection are through the SPI port. SPI1 Signals DRDYz SCK MISO MOSI SS:EECSz Description Data ready output, active low Serial clock Master in / slave out serial data Master out / slave in serial data Serial chip select, active low Modulator ∆Σ data is input through the modulator interface, and test DAC ∆Σ data is generated by the test bit stream generator.
CDB5378 2.3.1.2 Configuration - SPI Port On CDB5378, configuration of the digital filter is through the SPI port by the on-board 8051 microcontroller, which receives commands from the PC evaluation software via the USB interface. Evaluation software commands can write/read digital filter registers, specify digital filter coefficients and start/stop digital filter operation. Alternately, the digital filter can automatically load configuration information from an on-board serial EEPROM.
CDB5378 If no system clock is supplied to CDB5378, the DIGITAL FILTER CLOCK jumper (J16) can select a PLL input clock from a local oscillator. Using a clock divider, the on-board oscillator produces 1.024 MHz, 2.048 MHz, 4.096 MHz and 32.768 MHz clock outputs that can be applied to the CS5378 CLK input. 2.3.2 Specification Oscillator - Citizen 32.768 MHz VCXO Surface Mount Package Type Supply Voltage, Current Frequency Stability, Pullability Startup Time Value CSX750VBEL32.
CDB5378 cdb5378.v /////////////////////////////////////////////////////////////////////////// // MODULE: CDB5378 top module // // FILE NAME: Top module for connecting CS5378 to C8051F320 // VERSION: 1.0 // DATE: November 27, 2007 // COPYRIGHT: Cirrus Logic, Inc. // // CODE TYPE: Register Transfer Level // // DESCRIPTION: This module includes assignments for signals between // the serial port of Rodney and the SLAB micro.
CDB5378 2.3.3 Digital Control Signals The reset, synchronization and timebreak signals to the CS5378 digital filter can be generated by push buttons, received from external inputs or generated by the on-board microcontroller. By default, push buttons SYNC_PB and TIMEB_PB and external inputs SYNC_EXT (J50) and TIMEB_EXT (J59) are connected through the interface CPLD to the CS5378 digital filter SYNC and TIMEB inputs.
CDB5378 Pin # 1 2 3 4 5 6 7 8 Pin Name P0.1 P0.0 GND D+ DVDD REGIN VBUS Assignment Description SYNC_IO SYNC signal input from RS-485 SYNC_MC SYNC signal output Ground USB differential data transceiver USB differential data transceiver +3.3 V power supply input +5 V power supply input (unused on CDB5378) USB voltage sense input Pin # 9 Assignment RESETz 11 12 13 14 15 16 Pin Name /RST C2CK P3.0 C2D P2.7 P2.6 P2.5 P2.4 P2.3 P2.
CDB5378 Many connections to the C8051F320 microcontroller are inactive by default, but are provided for convenience during custom reprogramming. Listed below are the default active connections to the microcontroller and how they are used. 2.3.4.1 SPI Interface The microcontroller SPI interface communicates with the CS5378 digital filter to write/read configuration information and collect conversion data from the SPI port.
CDB5378 Telemetry signals enter CDB5378 through RS-485 transceivers, which are differential current mode transceivers that can reliably drive long distance communication. Data passes through the RS-485 transceivers to the microcontroller I2C interface and the clock and synchronization inputs.
CDB5378 2.3.5.2 I2C - SCL, SDA, Bypass The I2C telemetry connections to CDB5378 transmit and receive through RS-485 twisted pairs. Because signals passing through the transceivers are actively buffered, full I2C bus arbitration and error detection cannot be used (i.e. high-impedance NACK). The I2C inputs and outputs can be externally wired to create either a daisy chain or a bus-type network, depending how the telemetry system is to be implemented.
CDB5378 2.3.7 External Connector Power supplies and telemetry signals route to a 20-pin double row connector with 0.1" spacing (J26). This header provides a compact standardized connection to the CDB5378 external signals. Pins 1, 2 3, 4 5, 6 7, 8 9, 10 11, 12 13, 14 15, 16 17, 18 19, 20 2.
CDB5378 Specification Negative Analog Supply, -2.5VA Low Noise Micropower Regulator - Linear Tech Surface Mount Package Type Load Regulation, -40 C to +85 C Quiescent Current, Current @ 100 mA Load Output Voltage Noise, 10 Hz - 100 kHz Ripple Rejection, DC - 200 Hz Value -2.5 V LT1964ES5-BYP SOT-23 +/- 30 mV 30 µA, 1.3 mA 20 µVRMS > 45 dB The VA+ and VA- power supplies to the analog components on CDB5378 can be jumpered to use regulated bipolar power supplies (+2.5 V, -2.
CDB5378 The VD and VCORE power supplies on CDB5378 include reverse-biased Schottkey diodes to ground to protect against reverse voltages that could latch-up the CMOS components. Also included on VD and VCORE are 100 uF bulk capacitors for bypassing and to help settle transients plus individual 0.1 uF bypass capacitors local to the digital power supply pins of each device. 2.5 2.5.1 PCB Layout Layer Stack CDB5378 layer 1 is dedicated as an analog routing layer.
CDB5378 modulator is a 4-wire INR+, INF+, INF-, INR- quad group, and is routed with INF+ and INF- as a traditional differential pair and INR+ and INR- as guard traces outside the respective INF+ and INF- traces. INR+ INF+ INFINR- INR+ INF+ INFINR- Figure 5. Quad Group Routing 2.5.3 Bypass Capacitors Each device power supply pin includes 0.1 µF bypass capacitors placed as close as possible to the pin on the back side of the PCB.
CDB5378 2.5.4 Dual-row Headers To simplify signal tracing on CDB5378, all device pins connect to dual-row headers. These dual-row headers are not populated during board manufacture, but the empty PCB footprint exists on the boards and can be used as test points. Figure 7. Dual-row Headers with Shorts The dual-row header pins are shorted on the bottom side of the PCB to pass signals through to the rest of the board.
CDB5378 3. SOFTWARE DESCRIPTION 3.1 Menu Bar The menu bar is always present at the top of the software panels and provides typical File and Help pulldown menus. The menu bar also selects the currently displayed panel. Control Description File Load Data Set Loads a data set from disk. Save Data Set Saves the current data set to disk. Copy Panel to Clipboard Copies a bitmap of the current panel to the clipboard. Print Analysis Screen Prints the full Analysis panel, including statistics fields.
CDB5378 3.2 About Panel The About panel displays copyright information for the Cirrus Seismic Evaluation software. Click OK to exit this panel. Select Help Ö About from the menu bar to display this panel.
CDB5378 3.3 Setup Panel The Setup panel initializes the evaluation system to perform data acquisition. It consists of the following sub-panels and controls.
CDB5378 3.3.1 USB Port The USB Port sub-panel sets up the USB communication interface between the PC and the target board. Control Description Open Target Open USB communication to the target board and read the board name and microcontroller firmware version. When communication is established, the name of this control changes to ‘Close Target’ and Setup, Analysis and Control panel access becomes available in the menu bar. Close Target Disconnects the previously established USB connection.
CDB5378 3.3.2 Digital Filter The Digital Filter sub-panel sets up the digital filter configuration options. By default the Digital Filter sub-panel configures the system to use on-chip digital filter coefficients. The on-chip data can be overwritten by loading custom coefficients from the Customize sub-panel on the Control panel. Any changes made under this sub-panel will not be applied to the target board until the Configure button is pushed.
CDB5378 3.3.3 Analog Front End The Analog Front End sub-panel configures the amplifier, modulator and test DAC pin options. Pin options are controlled through the GPIO outputs of the digital filter. Any changes made under this sub-panel will not be applied to the target board until the Configure button is pushed. The Configure button writes the new configuration to the target board and then enables the data Capture button.
CDB5378 3.3.4 Test Bit Stream The Test Bit Stream sub-panel configures test bit stream (TBS) generator parameters. The digitial filter data sheet describes TBS operation and options. The DAC Quick Set controls automatically set the Interpolation, Clock Rate, and Gain Factor controls based on the selected Mode, Freq, and Gain. Additional configurations can be programmed by writing the Interpolation, Clock Rate, and Gain Factor controls manually.
CDB5378 3.3.5 Gain / Offset The Gain / Offset sub-panel controls the digital filter GAIN and OFFSET registers. The OFFSET and GAIN registers can be manually written with any 24-bit 2’s complement value from 0x800000 to 0x7FFFFF. The USEGR, USEOR, ORCAL, and EXP[4:0] values enable gain correction, offset correction, and offset calibration in the digital filter. The offset calibration routine built into the digital filter is enabled by writing the ORCAL and EXP[4:0] bits.
CDB5378 3.3.6 Data Capture The Data Capture sub-panel collects samples from the target board and sets analysis parameters. When the Capture button is pressed, the requested number of samples are collected from the target board through the USB port. The maximum number of samples that can be collected is 1,048,576 (1M). The number of samples should be a power of two for the analysis FFT routines to work properly.
CDB5378 3.3.7 External Macros Macros are generated within the Macros sub-panel on the Control panel. Once a macro has been built it can either be saved with a unique macro name to be run within the Macros sub-panel, or saved as an external macro and be associated with one of the External Macro buttons. A macro is saved as an External Macro by saving it in the . /macros/ subdirectory using the name ‘m1.mac’, ‘m2.mac’, etc.
CDB5378 3.4 Analysis Panel The Analysis panel is used to display the analysis results on collected data. It consists of the following controls.
CDB5378 3.4.1 Test Select The Test Select control sets the type of analysis to be run on the collected data set. Control Description Time Domain Runs a min / max calculation on the collected data set and then plots sample data value vs. sample number. Histogram Runs a histogram calculation on the collected data set and then plots sample occurrence vs. sample value. Only valid for noise data since sine wave data varies over too many codes to plot as a histogram.
CDB5378 3.4.2 Statistics The Statistics control displays calculated statistics for the analysis. Errors that affect statistical calculations will cause the Plot Error control to appear. Information about errors can be accessed by accessing the Plot Error controls. Control Description Time Domain Max Maximum code of collected data set. Min Minimum code of collected data set. Histogram Max Maximum code of collected data set. Min Minimum code of collected data set. Mean Mean of collected data set.
CDB5378 3.4.5 Zoom The ZOOM function allows an area on the graph to be expanded. To use the zoom function, click the ZOOM button and select the box corners of the area on the graph to expand. The graph will then expand to show the details of this area, and the plot axes will be re-scaled. While zoomed, you can zoom in farther by repeating the process. To restore the graph to its original scale, click the RESTORE button that appears while zoomed.
CDB5378 3.5 Control Panel The Control panel is used to write and read register settings and to send commands to the digital filter. It consists of the following sub-panels and controls.
CDB5378 3.5.1 DF Registers The DF Registers sub-panel writes and reads registers within the digital filter. Digital filter registers control operation of the digital filter and the included hardware peripherals, as described in the digital filter data sheet. Control Description Address Selects a digital filter register. Data Contains the data written to or read from the register. Read Initiates a register read. Write Initiates a register write. 3.5.
CDB5378 3.5.4 Macros The Macros sub-panel is designed to write a large number of registers with a single command. This allows the target evaluation system to be quickly set into a specific state for testing. The Register control gives access to both digital filter registers and SPI registers. These registers can be written with data from the Data control, or data can be read and output to a text window.
CDB5378 3.5.6 Customize The Customize sub-panel sends commands to upload custom FIR and IIR filter coefficients, start the digital filter, stop the digital filter and write/read custom EEPROM configuration files to the on-board boot EEPROM. Example data files are included in a sub-directory of the software installation. Control Description Load FIR Coef Write a set of FIR coefficients into the digital filter from a file.
DS639DB4 130-00014-Z1 A 130-00006-Z1 A 115-00016-Z1 115-00013-Z1 115-00012-Z1 115-00029-Z1 115-00011-Z1 115-00061-Z1 115-00061-Z1 115-00023-Z1 110-00055-Z1 115-00176-Z1 115-00012-Z1 110-00041-Z1 110-00056-Z1 115-00003-Z1 A 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 A A A A A A A A A A A A A 130-00009-Z1 A 15 A A A A A A A A A A A A 001-04076-Z1 004-00102-Z1 001-06603-Z1 000-00009-Z1 070-00004-Z1 070-00024-Z1 070-00055-Z1 165-00004-Z1 115-00014-Z1 110-00028-Z1 115-00014-Z1 130-00007-Z1
020-00934-Z1 021-00211-Z1 020-01095-Z1 020-01074-Z1 020-01128-Z1 020-01104-Z1 000-00001-Z1 020-00673-Z1 020-01962-Z1 020-00902-Z1 000-00002-Z1 020-01016-Z1 120-00011-Z1 120-00002-Z1 060-00195-Z1 A 060-00063-Z1 A 061-00062-Z1 A 060-00062-Z1 065-00178-Z1 060-00162-Z1 060-00236-Z1 065-00228-Z2 065-00196-Z1 065-00130-Z1 060-00067-Z1 061-00064-Z1 A 062-00022-Z1 A 062-00055-Z1 A 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 A E A A A0 A A A A A A A A A A A A
DS639DB4 240-00133-Z1 C PCB CDB5378-Z NPb 600-00133-Z1 C1 SCHEM CDB5378-Z NPb 300-00025-Z1 A 110-00028-Z1 115-00013-Z1 115-00029-Z1 020-06288-Z1 70 71 72 73 74 75 76 A A A A 110-00013-Z1 D 603-00133-Z1 C 68 69 CON BNC-PCB RCPT NPb RA HDR 2x2 MLE .1"CTR .062BD S GLD NPb HDR 8x2 ML .1" 062BD ST GLD NPB TH RES 680 OHM 1/10W ±1% NPb 0603 FILM SCREW 4-40X5/16" PH MACH SS NPb CON SHUNT 2P .1"CTR BLK NPb ASSY DWG PWA CDB5378-Z NPb DIODE TR 13V 600W NPb AXL WIRE BPOST 1.5X.
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CDB5378 7. REVISION HISTORY Revision 74 Date Changes DB1 FEB 2006 Initial Release. DB2 APR 2006 Minor correction. DB3 AUG 2006 Corrected PDF printing problem. DB4 NOV 2007 Updated differential op amp from CS3301 to CS3301A.
