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http://www.cirrus.com

Evaluation Board for the CS42L73

Features

 Analog Inputs

– Line-level In via 2x mono RCA jacks

– Microphone In via 2x mono 1/8” jacks



Analog outputs

– Headphone out via 1x stereo 1/8” jack

– Line-level out via 2x mono RCA jacks

– Earphone out via terminal block

– Speakerphone out via terminal blocks



S/PDIF interface via RCA/optical jacks

– Input: CS8416 digital audio receiver

– Output: CS8406 digital audio transmitter



External digital I/O via stake headers

– Digital mic in

– Serial audio port I/O

– External I²C

™

control port I/O



Flexible power-supply configuration

– USB, external power supply, or battery



FlexGUI software control

– Windows

compatible

– Predefined and user-configurable scripts

Description

The CDB42L73 board is a dedicated platform for testing

and evaluating the CS42L73, an ultralow power mobile

audio and telephony CODEC.

To allow comprehensive testing of CS42L73 features

and performance, extensive hardware and software

configurable options are available on the CDB42L73.

Hardware options, such as power-supply settings, are

configured via jumpers on the stake headers.

Software options, such as registry settings for the

CS42L73, are configured with the FlexGUI software,

which communicates with the CDB42L73 via USB from

a Windows

compatible computer. In addition, digital

I/O headers on the CDB42L73 allow external control

signals (for example, an external DSP or microcontrol-

ler) to configure and interface with the CS42L73 and

other devices directly without the use of FlexGUI.

The CDB42L73 also serves as a good component and

layout reference for the CS42L73.

ORDERING INFORMATION

CDB42L73 Evaluation Board

USB

+5V, GND

(Bind. Post)

VA, VP, VCP, VL, VD_FILT

(Bind. Post)

Battery – VP only

(Header)

Regulators

Power Source Selection (Headers)

CS42L73

Current Sense Resistors for Power Measurement (Bypassable)

S/PDIF In

(Optical)

S/PDIF In

(RCA)

S/PDIF Out

(Optical)

S/PDIF In

(RCA)

CS8416

CS8406

Clocks

And

Data

Selection

(Headers)

Micro-

Controller

Canned

Oscillator

I2C and Board

Controls

Line In Stereo

(RCA)

Mic In 1 and 2

(1/8")

Digital Mic In

(Header)

Headphone Out

(1/8")

Lineout Stereo

(RCA)

Spkphone Out

(Term. Block & 1/8")

Spkphone/Line Out

(Term. Block & 1/8")

Earphone Out

(Term. Block & 1/8")

Direct External Digital

I/O

JUNE '10

DS882DB1

CDB42L73

Summary of content (36 pages)

PAGE 1
CDB42L73 Evaluation Board for the CS42L73 Features Description  Analog Inputs – Line-level In via 2x mono RCA jacks – Microphone In via 2x mono 1/8” jacks The CDB42L73 board is a dedicated platform for testing and evaluating the CS42L73, an ultralow power mobile audio and telephony CODEC.
PAGE 2
CDB42L73 TABLE OF CONTENTS 1. QUICK SETUP GUIDE ........................................................................................................................... 4 2. THE CDB42L73 SYSTEM OVERVIEW .................................................................................................. 5 2.1 Power Supply Circuitry ..................................................................................................................... 5 2.2 Digital Inputs and Outputs ...........................
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CDB42L73 Figure 20. Power ....................................................................................................................................... 28 Figure 21. Top Side Silkscreen ................................................................................................................. 29 Figure 22. Layer 1 ..................................................................................................................................... 30 Figure 23. Layer 2 ........................
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CDB42L73 1. QUICK SETUP GUIDE This section describes a short procedure to set the CDB42L73 to a standard state for evaluation. 1. Return all jumpers to their factory default settings as described in Table 2 on page 10, and displayed in Figure 1 on page 11 2. Install the FlexGUI software as outlined in Section 4.2 on page 12. 3. Connect a +5 V power supply to the +5 V Ext (J1) and GND (J2) binding post on the CDB42L73. 4. Connect a USB cable from a Windows®-compatible PC to the CDB42L73. 5.
PAGE 5
CDB42L73 2. THE CDB42L73 SYSTEM OVERVIEW The CDB42L73 evaluation board is a convenient platform for evaluating the CS42L73 ultralow-power mobile and telephony CODEC. It supports multiple power supply and signal I/O configurations, including the option to drive the CS42L73 externally (which bypasses on-board circuitry). The CDB42L73 is also a good component and layout reference for the CS42L73. Section 2.1 through Section 2.8 below describe the various features of the CDB42L73 evaluation board in detail.
PAGE 6
CDB42L73 2.4 Analog Inputs Line input (via 2x mono RCA jacks) and microphone input (via 2x mono 1/8-inch jacks) are available on the CDB42L73. Analog input circuitry simply consists of DC-blocking capacitors and several resistors as shown in the Typical Connections Diagram of the CS42L73 datasheet. Button switch S2 engages the CS42L73’s MIC2 automute function when pressed. Jumper pin blocks J54, J55, and J56 allow the user to evaluate the pseudo-differential analog input features of the CS42L73.
PAGE 7
CDB42L73 2.8 CS42L73 Ultralow Power Mobile Audio and Telephony CODEC The CS42L73 is a highly integrated, ultralow power, audio and telephony CODEC for portable applications. It features microphone and line inputs; three bidirectional serial ports with high-performance ASRCs; and headphone, line, and speaker amplifiers. A complete description of the CS42L73 can be found in its datasheet, downloadable from http://www.cirrus.com. 2.
PAGE 8
CDB42L73 3. SYSTEM CONNECTIONS AND JUMPER SETTINGS Board connections and settings are shown in Table 1 and Table 2 below.
PAGE 9
CDB42L73 JUMPER PIN BLOCK J50 PURPOSE +5 V +5 V main supply select POSITION [*] FUNCTION SELECTED +5V EXT +5 V supply source from J1 USB +5 V supply source from USB J10 VA CS42L73 VA supply source select [*] J11 VL CDB42L73 VL supply VL EXT CDB42L73 VL supply = J4 source select [*] +1.8 V LDO CDB42L73 VL supply = 1.8 V derived from LDO (see also J25) +1.8 V BUCK CDB42L73 VL supply = 1.
PAGE 10
CDB42L73 JUMPER PIN BLOCK J54 PURPOSE POSITION LINEIN_REF Line input reference [*] to GND select FUNCTION SELECTED Shunted Line input shield connection of J32 and J33 is shunted to board ground. Open Line input shield connection of J32 and J33 is not connected to board ground, thus the CS42L73 line input is referenced to the incoming signal reference instead of the board ground. J55 MIC1_REF MIC1 reference to GND select [*] Shunted MIC1 input shield connection of J34 is shunted to board ground.
PAGE 11
CDB42L73 LED STATUS FUNCTION D5 VA On Off Indicates the CS42L73 VA supply is powered. Indicates the CS42L73 VA supply is not powered. D6 VCP On Off Indicates the CS42L73 VCP supply is powered. Indicates the CS42L73 VCP supply is not powered. D7 VD_FILT On Off Indicates the CS42L73 VD_FILT supply is powered. Indicates the CS42L73 VD_FILT supply is not powered. D8 VP On Off Indicates the CS42L73 VP supply is powered. Indicates the CS42L73 VP supply is not powered.
PAGE 12
CDB42L73 4. SOFTWARE CONTROL USING FLEXGUI 4.1 Installation and First-time Setup The Cirrus Logic FlexGUI application is a graphical user interface that allows users to easily configure software modifiable options on the CDB42L73, such as the register settings of the CS42L73 and the S/PDIF interface devices (CS8416, CS8406). To set up FlexGUI for use with the CDB42L73, please follow these steps: 1. Download the latest version of the FlexGUI control software from www.cirrus.com/msasoftware.
PAGE 13
CDB42L73 To restore one of several standard configurations pre-defined at the factory, load the register settings starting with “Factory_Default” in its file name. The file names are meant to be self-explanatory. For example, if “Factory_Default_LINEIN_to_ASPOUT_ASPIN_to HP_LINEOUT.fgs” is loaded, the Line Input is routed to the Audio Serial Port to the S/PDIF output, and the S/PDIF input is routed to the Audio Serial Port to the Headphone and Line Output. 4.
PAGE 14
CDB42L73 4.3.1 S/PDIF Tab The “S/PDIF” tab contains the main controls for setting up the S/PDIF interface of the CDB42L73. A brief description of each control group is described below.
PAGE 15
CDB42L73 4.3.2 Power Tab The “Power” tab contains the main controls for setting the power options of all functional blocks in the CS42L73. A brief description of each control group is described below.
PAGE 16
CDB42L73 4.3.3 Clocking XSP VSP ASP Tab The “Clocking XSP VSP ASP” tab contains the main controls for setting the clocking related options of all functional blocks in the CS42L73. A brief description of each control group is described below.
PAGE 17
CDB42L73 4.3.4 Analog Input Tab The “Analog Input” tab contains the main controls for setting the analog input circuitry options of the CS42L73. A brief description of each control group is described below.
PAGE 18
CDB42L73 4.3.5 Input DSP Tab The “Input DSP” tab contains the main controls for setting the digital signal processing applied to the analog inputs (including the digital microphone) of the CS42L73. A brief description of each control group is described below.
PAGE 19
CDB42L73 4.3.6 Digital Mixer 1 Tab The “Digital Mixer 1” tab contains the main controls for setting the digital mixing/routing options for all three serial ports of the CS42L73. A brief description of each control group is described below.
PAGE 20
CDB42L73 4.3.7 Digital Mixer 2 Tab The “Digital Mixer 2” tab contains the main controls for setting the digital signal mixing/routing to the analog outputs of CS42L73. A brief description of each control group is described below.
PAGE 21
CDB42L73 4.3.8 Output DSP Tab The “Output DSP” tab contains the main controls for setting the digital signal processing applied to the analog outputs of the CS42L73. A brief description of each control group is described below.
PAGE 22
CDB42L73 4.3.9 Analog Output Tab The “Analog Output” tab contains the main controls for setting the analog output circuitry options of the CS42L73. A brief description of each control group is described below.
PAGE 23
CDB42L73 4.4 The Register Map The register map shows the entire user configurable register space for all programmable devices on the CDB42L73. It is especially useful for reading/writing a device’s register settings directly, one whole register at a time. For example, the default value for register 0x11 is 0x15 (Figure 15). To modify register 0x11’s value, first navigate to it by locating the cell at the intersection of row “10” and column “01.
PAGE 24
DS882DB1 5. SCHEMATICS AND LAYOUT +5V, GND (Bind. Post) USB Battery – VP only (Header) VA, VP, VCP, VL, VD_FILT (Bind. Post) Regulators Power Source Selection (Headers) MicroController Current Sense Resistors for Power Measurement (Bypassable) I2C and Board Controls Headphone Out (1/8") Canned Oscillator S/PDIF In (Optical) Lineout Stereo (RCA) CS8416 S/PDIF In (RCA) Clocks And Data Selection (Headers) S/PDIF Out (Optical) CS42L73 Spkphone Out (Term. Block & 1/8") Spkphone/Line Out (Term.
PAGE 25
DS882DB1 25 CDB42L73 Figure 17.
PAGE 26
DS882DB1 26 CDB42L73 Figure 18.
PAGE 27
DS882DB1 27 CDB42L73 Figure 19.
PAGE 28
DS882DB1 28 CDB42L73 Figure 20.
PAGE 29
DS882DB1 29 CDB42L73 Figure 21.
PAGE 30
DS882DB1 30 CDB42L73 Figure 22.
PAGE 31
DS882DB1 31 CDB42L73 Figure 23.
PAGE 32
DS882DB1 32 CDB42L73 Figure 24.
PAGE 33
DS882DB1 33 CDB42L73 Figure 25.
PAGE 34
DS882DB1 34 CDB42L73 Figure 26.
PAGE 35
DS882DB1 35 CDB42L73 Figure 27.
PAGE 36
CDB42L73 6. REVISION HISTORY Release DB1 Changes Initial Release Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to www.cirrus.com. IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable.