Manual

CDB4265
DS657DB1 11
4. FPGA REGISTER QUICK REFERENCE
This table shows the register names and their associated default values.
Addr Function 7 6 5432 1 0
01h
Code Rev. ID
Rev7 Rev6 Rev5 Rev4 Rev3 Rev2 Rev1 Rev0
xxxxxx x x
02h
MCLK Source
Reserved Reserved MCLK1 MCLK0 Reserved Reserved Reserved Reserved
001000 0 0
03h
Subclock
Source
Reserved Reserved Reserved Reserved Reserved Reserved SUBCLK1 SUBCLK0
000100 0 1
03h
CS4265 SDIN
Source
Reserved SDIN2.2 SDIN2.1 SDIN2.0 Reserved SDIN1.2 SDIN1.1 SDIN1.0
000000 0 0
04h
Transmitter
SDIN Source
Reserved Reserved Reserved Reserved Reserved TXSDIN2 TXSDIN1 TXSDIN0
000100 0 1