Manual

CDB42438
DS646DB2 15
4. FPGA REGISTER QUICK REFERENCE
Function 7 6 5 4 3 2 1 0
01h
TDM Conver-
sion
DSP/CS8416 Reserved Reserved Reserved Reserved Reserved Reserved PDN_TDMer
p16 default
0000000 0
02h
CODEC
SDIN Control
Reserved Reserved Reserved Reserved Reserved Reserved SDIN.MUX1 SDIN.MUX0
p16 default
1111111 0
03h
CODEC
Clock Control
Reserved Reserved Reserved Reserved Reserved CLK_MUX1 CLK_MUX0 FPGA->
CODEC
p17 default
0011011 0
04h
CS8406 Con-
trol
Reserved Reserved MUX2 MUX1 MUX0 128/256
Fs I²S/LJ Reserved
p17 default
0110000 1
05h
CS8416 Con-
trol
Reserved Reserved Reserved RST
M/S 128/256 Fs I²S/LJ RMCK_Master
p18 default
0011100 0
06h
Bypass Con-
trol
BypassFPGA
DSPDATA
->DAC
Reserved CS5341
->AUX
Reserved Reserved Reserved Reserved
p19 default
1110111 1
07h
DSP Header
Control
Reserved Reserved DATA_MUX2 DATA_MUX1 DATA_MUX0 Reserved Reserved MCLK_M/S
p20 default
0000001 0
08h
CS5341/Misc
Control
Reserved Reserved INT.MCLK_
DIV
OMCK/DIV_
1.5/2
‘41_MCLK_
DIV
‘41_DIV_
1.5/2
‘41_I²S/LJ
‘41_RST
p22 default
0100000 1