Instruction Manual

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CDB42428

1.16 DSP Header Signals

Header

Pin #

Signal Description Source Schematic

Signal Name

Buffer Buffer

Voltage

1 Master Clock

CS424xx or DSP

DSP_MCLK 74VHC125 VLS

2 Ground CDB GND - -

3 DAC port LRCK

CS424xx or DSP

DSP_DAC_LRCK 74VHC125 VLS

4 Ground CDB GND - -

5 DAC port SCLK

CS424xx or DSP

DSP_DAC_SCLK 74VHC125 VLS

6 Ground CDB GND - -

7 DAC port SDATA Input 1 DSP DSP_SDAT1 74VHC125 VLS

8 Ground CDB GND - -

9 DAC port SDATA Input 2 DSP DSP_SDAT2 74VHC125 VLS

10 Ground CDB GND - -

11 DAC port SDATA Input 3 DSP DSP_SDAT3 74VHC125 VLS

12 Ground CDB GND - -

13 DAC port SDATA Input 4 DSP DSP_SDAT4 74VHC125 VLS

14 Ground CDB GND - -

15 no connect - - - -

16 Ground CDB GND - -

17 ADC port LRCK

CS424xx or DSP

DSP_ADC_LRCK 74VHC125 VLS

18 Ground CDB GND - -

19 ADC port SCLK

CS424xx or DSP

DSP_ADC_SCLK 74VHC125 VLS

20 Ground CDB GND - -

21 no connect - - - -

22 Ground CDB GND - -

23 ADC port SDATA Output

CS424xx

DSP_ADC_SDOUT 74VHC125 VLS

24 Ground CDB GND - -

25 Unused Buffered Output

- 74VHC125 VLS

26 Ground CDB GND - -

27 No Connect - - - -

28 Ground CDB GND - -

29 Serial Port Interface Power CDB VLS - -

30 Ground CDB GND - -

31 Serial Port Interface Power CDB VLS - -

32 Ground CDB GND - -

Table 4. CS424xx DS P Header Signals