Instruction Manual

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Cirrus Logic, Inc. 2003

Cirrus Logic, Inc.

http://www.cirrus.com

CDB42428

Evaluation Board For CS424xx

Features

Single-Ended Analog Inputs and Outputs

CS8416 S/PDIF Receiver

CS5361 converters supply ADCIN1 and

ADCIN2 for CS424xx One Line Modes

CS8406 S/PDIF Digital Audio Transmitter

Header for optional external configuration of

CS424xx and board

Header for external DSP serial audio I/O

3.3 or 5.0 Volt Logic Interface supply

Demonstrates recommended layout and

grounding arrangements

Microsoft Windows® compatible software

interface to configure CS424xx and inter-

board connections

Description

The CDB42428 demonstration board is an excellent

means for evaluating the CS424xx family of highly inte-

grated multi-channel CODECs. Evaluation requires an

analog/digital signal source and analyzer, Windows®

compatible computer, and power supplies.

System timing can be provided by an on-board oscillator

or a master clock recovered from the S/PDIF input to the

CS8416. RCA phono jacks are provided for the CS5361

analog inputs and CS424xx analog inputs and outputs.

Digital data I/O is available via RCA phono jacks or opti-

cal connectors to the CS8416 and from the CS8406.

The Windows® software provides a graphical user inter-

face to make configuration of the board easy. The

software communicates through the computer’s parallel

port, and will configure the hardware to allow all features

of the CS424xx to be evaluated. The evaluation board

may also be configured to accept external timing and

data signals for operation in a user application during

system development.

ORDERING INFORMATION

CDB42428 Evaluation Board

PC Parallel Port

Analog Inputs

S/PDIF Output

+18V -18V +5V GND

CPLD

Ext. Control

Analog

Filter

CS5361

(x2)

CS8406

DSP Header

S/PDIF Input

CS8416

Analog O utputs

8-ch

Analog

Output

Mute

C S 42428

Nov ‘03

DS605DB1

Summary of content (32 pages)

PAGE 1
CDB42428 Evaluation Board For CS424xx Features Description Single-Ended Analog Inputs and Outputs CS8416 S/PDIF Receiver CS5361 converters supply ADCIN1 and The CDB42428 demonstration board is an excellent means for evaluating the CS424xx family of highly integrated multi-channel CODECs. Evaluation requires an analog/digital signal source and analyzer, Windows® compatible computer, and power supplies.
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CDB42428 TABLE OF CONTENTS 1. SYSTEM OVERVIEW ............................................................................................................... 4 1.1 CS424xx ............................................................................................................................ 4 1.2 CS8406 .............................................................................................................................. 4 1.3 CS8416 ..............................................................
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CDB42428 Figure 18. Top Layer..................................................................................................................... 30 Figure 19. Bottom Layer................................................................................................................ 31 LIST OF TABLES Table 1. System Connections ......................................................................................................... 6 Table 2. Jumper Settings ..............................................
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CDB42428 1. SYSTEM OVERVIEW The CDB42428 demonstration board is an excellent means for evaluating the CS42428/26/18/16 family of highly integrated CODECs. Analog and digital audio signal interfaces are provided, as well as a DB-25 computer parallel port interface for use with the supplied Windows® configuration software. The CDB42428 schematic set has been partitioned into 14 pages as shown in Figures 3 through 16. 1.
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CDB42428 The 2-pole low pass filter provides an example of an inexpensive circuit with good distortion and dynamic range performance. It is designed to have the in-band impedance matched between the positive and negative legs. It also provides a balanced to single-ended conversion for standard un-balanced outputs. Evaluate this circuit by placing the FILT jumpers (three per output channel) to position 1 (selectable by J9, J10 & J11 for OUTA1, etc.).
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CDB42428 1.8 CPLD The CPLD controls the on-board signal routing and configuration (see Figure 14). The CPLD interfaces with the computer software through the DB-25 parallel port header, or can communicate with an external processor via the External Control header. 1.9 DB-25 Computer Parallel Port On-board clock and data routing and configuration logic, as well as the CS424xx part are configured using a computer with the supplied Windows®-based software.
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CDB42428 OPT4 Input CS8416 digital audio interface input via optical SPDIF TX - J2 Output CS8406 digital audio interface output via coax SPDIF TX - OPT2 Output CS8406 digital audio interface output via optical PC Port - J22 Input/Output Parallel connection to computer for SPI / I2C control port signals EXTERNAL CONTROL HEADER - J17 Input/Output I/O for SPI / I2C control port signals - see signal descriptions below DSP HEADER - J36 Input/Output I/O for DSP serial port signals - see signal de
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CDB42428 Header Pin # Signal Description Source Schematic Signal Name Buffer Buffer Voltage 10 Ground CDB GND - - 11 Master MUTE to all Outputs CTRL EXT_MUTE 74VHC125 VLC 12 Ground CDB GND - - 13 Master RESET CTRL EXT_RESET Diode - 14 Ground CDB GND - - 15 CS424xx Interrupt (Programmable) CS424xx EXT_HDR_INT 74VHC125 VLC 16 Ground CDB GND - - 17 Enable external I2C interface CTRL EXT_EN_SCL 74VHC125 VLS 18 Ground CDB GND - - 19 Enable external I2C
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CDB42428 1.
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CDB42428 2. INITIAL BOARD SETUP 2.1 Power Supplies: 1) Verify that all power supplies are off before making connections. 2) Connect a +5.0 VDC power supply to the +5 V (J48) red binding post. Select VLS and VD operating voltage by placing a jumper on J37 and J38 to select either +5 V or +3.3 V. 3) Connect a +12.0 to +18.0 VDC power supply to the +18 V (J50) green binding post. If using the FILT position number 2 for the output filter stage, then supply +18.0 V only. 4) Connect a -12.0 to -18.
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CDB42428 3. CDB425XX.EXE USER'S GUIDE 3.1 Main Window The main window of the CDB42428 control application allows the user to configure the CDB42428 inter-board routing of clocks and data, as well as setup the CS5361, CS8416 and CS8406 parts. To make changes to the CS5361, CS8406, CS8416, or inter-board routing, the “Configure Board” radio button must be selected. The RESET CS425xx button will reset only the part.
PAGE 12
CDB42428 • Analog signal source and analyzer • Digital signal source and analyzer • Windows® compatible computer with parallel port cable and CDB425xx software Step 1 - Follow Initial Board Setup procedure as described above Step 2 - Connect to Windows® Software Connect the computer to the board and launch the CDB425xx software. Step 3 - Connect Signal Source Connect the analog output from the analyzer to the Left Analog Input J7.
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CDB42428 3.
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Figure 2. Output Channel Mute Select MUTEC EN_MUTE6 GPO6 MUTEC EN_MUTE7 GPO7 MUTEC EXT_MUTE +V MUTE CH 3 - 8 MUTE CH 2 MUTE CH 1 EXT_MUTE and GPO6 EXT_MUTE and MUTEC or EXT_MUTE and GPO7 EXT_MUTE and MUTEC or EXT_MUTE and MUTEC MUTE CONTRO L 3-8 2 1 CHANNEL CDB42428 4.
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CDB42428 Figure 3. CS424xx 5.
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Figure 4.
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Figure 5.
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CDB42428 Figure 6.
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CDB42428 Figure 7.
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CDB42428 Figure 8.
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Figure 9.
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Figure 10.
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Figure 11.
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Figure 12.
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Figure 13.
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Figure 14.
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Figure 15.
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Figure 16.
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Figure 17.
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Figure 18.
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Figure 19.
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CDB42428 6. ADDENDUM The following silkscreen markings on the evaluation board are mislabeled and should be labeled as specified (all schematic labels in Figures 3-16 are correct): 1) DSP HEADER pin 23 (DAC_SDOUT) should be labeled “DSP_ADC_SDOUT”. 2) DSP HEADER pin 25 (ADC_SDOUT) should be labeled “DSPHDR_PIN25”. 3) Test point ADC_SDOUT should be labeled “U27_PIN54”. 4) Test point DAC_SDOUT should be labeled “ADC_SDOUT”.