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Application Note

CS5480/84/90 Energy Measurement IC Calibration

1 Introduction

The Cirrus Logic CS5480/84/90 energy measurement IC is designed with industry-leading calibration algorithms

that simplify measurement applications. The CS5480/84/90 calibration is engineered so power meter manufacturers

can use low-cost components to achieve highly accurate power measurement. Calibration methods specified by IC

manufacturers can vary substantially despite the power meter manufacturers’ requirements to comply with tightly

regulated standards. This application note will introduce the procedures available for calibrating the CS5480/84/90

devices, empowering power meter manufacturers to exceed industry standards.

2Overview

This application note covers system scaling concepts, including hardware scaling, analog front end (AFE) scaling,

and controller (MCU) scaling. The relationship between full-scale measurements and AFE measurements is

discussed, and a corresponding application processor example is presented. The typical hardware configuration

required to perform calibration and compensation is also presented. Then the types of calibrations in the

CS5480/84/90 are detailed. The calibration and compensation procedure is provided in a step-by-step process that

determines the AFE calibration and compensation constants.

Flow diagrams are provided for each calibration and compensation process. The customer demonstration board

(CDB5484U) is used to illustrate the calibration process and provide examples of the serial port reads/writes

transmitted at each calibration step.

Below are the calibration essentials discussed in this document:

- System Scaling

- Types of Calibration and Compensation

- Calibration and Compensation Procedure

- Calibration and Compensation Example with Hardware Configuration

3 System Level Configurations

Upon power-up, the CS5480/84/90 requires an initial register configuration before executing power measurements.

One of the key configurations is adjusting the system scaling for the power meter application. The key scaling

constants are identified through calibration and compensations performed at the power meter manufacturer. After

the configuration and calibration constants are established, the calibration constants are downloaded during a

normal power-on reset. The application will start conversions and report power and input performance over time.

During power conversions and calculations, the analog inputs are sampled at 512 kHz, decimated down to 4kHz

high-rate conversion cycles. The high-rate samples are averaged to produce a 1 second low-rate power

accumulation measurement, which is used to update registers and, when enabled, generate pulses that represent

the power results (N = 4000, MCLK = 4.096 MHz). The CS5480/84/90 performs signal conditioning along the digital

data path, which improves the accuracy of the power meter measurements. Signal conditioning is provided in the

high-rate path (gain, phase, and DC offset) and in the lower rate path (no load current RMS offset, AC offset, active

and reactive power offset).

AN366

MAY’12

AN366REV2

Summary of content (50 pages)

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AN366 Application Note CS5480/84/90 Energy Measurement IC Calibration 1 Introduction The Cirrus Logic CS5480/84/90 energy measurement IC is designed with industry-leading calibration algorithms that simplify measurement applications. The CS5480/84/90 calibration is engineered so power meter manufacturers can use low-cost components to achieve highly accurate power measurement.
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AN366 3.1 System Scaling Overview The maximum voltage, current, and power measurements are unique in each meter design and dependent on the sensors used in the measurement of these parameters. The CS5480/84/90 solves this problem using scaling. Instead of recording the actual voltage, current, or power sensed by the power meter, the IC records a ratio of each measurement that is proportional to the meter’s full-scale.
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AN366 3.2 System Scale Example Figure 1 illustrates an example of the system scaling. N L Pulse VIN- OR VIN+ Pulse CS5480 /84 / 90 (AFE) Display IIN+ Application Processor CT Serial Port IINLOAD Power 19.2kW 240 VRMS , 80ARMS Input 176mVRMS , 35mVRMS Pavg: ±0.36 VRMS : 0.6 IRMS : 0.6 19.2kW 240 VRMS , 80ARMS 19.2kW 240 VRMS , 80ARMS Hardware Scale AFE Scale MCU Scale Output Figure 1.
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AN366 3.3 AFE Scaling Range The CS5484 full scale RMS register values are commonly reported as 0.6 when the inputs are at a maximum level. The ratio of the AFE inputs to full scale defines the reference point for all other input levels. The 24-bit I1RMS and V1RMS registers are defined in Figure 2. Note that the digital scaling for RMS current (positive only) does not match the scaling for power (signed). Section 6.
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AN366 3.4 Application Processor Scaling Example The scaling example below demonstrates how to convert from the current register value to the reported current using the full-scale value. The specified full-load (CurrentFULLSCALE) is 50A. If the AFE current register value (CurrentREGISTER) is 0.25 (0x40 0000), then the actual current value (ReportedCurrentACTUAL) is calculated by the application processor using Equation 3. Use Equation 3 to convert the current register value to the real current:.
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AN366 Use Equation 5 to convert the hexadecimal value to a decimal ratio value: 1 -  hex2dec  VALUE Hexidecimal  VALUE Decimal = – MSB  ----------------23 2 –1 [Eq: 5] Using Equation 5, the following table identifies the key values. Key Power Register Values Range (-1 to 1) Decimal Value Register Value Maximum Power Register 1 0x7FFFFF Maximum Power Input 0.
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AN366 Figure 4 illustrates a typical hardware configuration for calibration and compensation: AC SOURCE L Pulse OR VIN + Pulse CS5480 /84/90 (AFE) Calibration Controller IIN + Application Processor CT IIN - Display VIN - Optical Sensor N Serial Port Power Reference Meter LOAD AC LOAD Figure 4.
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AN366 4.1 AFE Calibrations The CS5480/84/90 AFE incorporates three calibrations: gain, AC offset, and DC offset. Gain calibration is always required. AC offset calibration is only required when IRMS needs to be accurate at low input levels. DC offset calibration is made available but not recommended for AC power meters. Instead, high-pass filters are used to remove DC offset.
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AN366 4.1.2.2 Non-full-scale Gain Calibration When resources are limited, it may be necessary to provide non-full-scale amplitudes and perform built-in calibration to provide the maximum voltage and current during calibration. To perform a non-full-scale calibration, the initial gain register conditions of the device must be identified before calibration. Usually, initial gain register conditions are set to a default value of one, but this is not required.
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AN366 Current Scale Register To perform calibration with less than full scale load without using the above procedure, it is possible to set the current channel's Scale register. The current channel calibration data path contains a Scale register (page 18, address 63) that can be adjusted before calibration to accommodate the non-full-scale load. I REF 23 I SCALE = ------------  0.
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AN366 8.99º @ 50Hz 10.79º @ 60Hz Set CPCC = 11 of 2OWR on V + FPCC provides adjustment 4.5º @ 50Hz 5.4º @ 60Hz Set CPCC = 10 of 1OWR on V + FPCC provides adjustment Before Calibration I is delayed from V Delay added to V 0º Before Calibration V is delayed from I Delay added to I Clear CPCC = 00 + FPCC provides adjustment -4.5º @ 50Hz -5.4º @ 60Hz Set CPCC = 01 of 1OWR on I + FPCC provides adjustment -8.99º @ 50Hz -10.79º @ 60Hz Figure 6. Phase Compensation and Phase Offset Error 4.2.
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AN366 5 Calibration and Compensation Procedures A CS5480/84/90 power meter normally has two modes of operation: calibration, which is executed only once at the factory, and normal operation in the field. Calibration will compensate for system-level errors and is only performed at the factory. Normal operation is a continuous running mode (continuous conversion mode) or user-initiated, single execution mode (single conversion mode).
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AN366 POWER UP CLEAR DRDY RESET RESTORE CONFIGURATION and CONTROL REGISTERS DRDY SET? NO YES CLEAR DRDY From NVM RESTORE GAIN REGISTERS READ IRMS, VRMS, PAVG From NVM RESTORE OFFSET REGISTERS CALCULATE VOLTS = FS_Voltage · (VRMS/0.6) AMPS = FS_Current · (VRMS/0.6) WATTS = FS_Scale_Power · (VRMS/0.36) From NVM RESTORE POFF and QOFF REGISTERS SINGLE CONVERSION VALID REGISTER CHECKSUM ? NO YES START CONTINUOUS CONVERSION 0xD5 Figure 7.
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AN366 5.2 Full Calibration and Compensation Procedure (Performed Once at Factory) The following procedure shows the steps required to perform calibration and compensation. A flow chart showing the full calibration procedure is shown in Figure 5. 1. Power up the CS5480/84/90 device. 2. Reset the CS5480/84/90 device. 3. Verify the register checksum to confirm the reset is successful. 4. Restore configuration and control registers. 5.
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AN366 POWER UP SINGLE CONVERSION VALID RESET CHECKSUM? READ IRMS, VRMS, PAVG, QAVG, PF NO YES (Note 3) YES PERFORM PHASE COMPENSATION, IACOFF CALIBRATION, and POWER OFFSET CORRECTION if NECESSARY START CONTINUOUS CONVERT 0xD5 RESET (See Note 1) START CONTINUOUS CONVERSION AND VERIFY METER ACCURACY CONFIRM REFERENCE SIGNALS ARE APPLIED CORRECTLY ACCURACY IN SPEC? ROGOWSKI SENSOR? STOP CONVERSIONS 0xD8 NO DC MEASUREMENT? YES READ VGAIN, IGAIN, IACOFF, POFF, QOFF, PC, RegChk Tsettle = 2000m
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AN366 FROM MAIN FLOW 0.010547 @ 60Hz RESOLUTION MULTIPLIER 0.008789 (50Hz) (Note 1) APPLY REFERENCE LINE VOLTAGE AND 60O LAGGING LOAD CURRENT PF=0.5 ±10.79º @ 60Hz -8.99º < PHASE OFFSET < +8.99º (50Hz) NO ? (Note 2) Tsettle = 2000 ms (Note 1) YES YES SampleCount (N)= 16,000 (Note 1) START CONTINUOUS CONVERSION 0xD5 STOP CONVERSIONS 0xD8 FAIL METER Note 4 PHASE OFFSET NEGATIVE ? NO -512 0.010547 to 0 @ 60Hz -512 · 0.008789 < PHASE OFFSET < 0 (50Hz) ? NO 0 to 512 0.
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AN366 FROM MAIN FLOW FROM MAIN FLOW FROM MAIN FLOW APPLY FULL SCALE VOLTAGE AND ZERO LOAD CURRENT SHORT VOLTAGE AND CURRENT INPUTS REMOVE LOAD CURRENT Tsettle = 2000 SampleCount N = 16000 Tsettle = 2000 SampleCount N = 16000 Tsettle = 2000 SampleCount N = 16000 CLEAR DRDY CLEAR DRDY CLEAR DRDY SEND DC OFFSET CALIBRATION 0xE6 SEND AC OFFSET CALIBRATION 0xF6 DRDY SET? START CONTINUOUS CONVERT 0xD5 DRDY SET ? DRDY SET ? NO NO YES YES NO YES READ PAVG and QAVG READ IRMS, VRMS, IDCOFF,
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AN366 6 Full Calibration and Compensation Example Using the CDB5484 and MTE Meter Test Equipment The calibration and compensation flows have been implemented using the CDB5484U and a PC as the controller. Using a MTE Meter Test Equipment AG PTS 400.3 Modular Portable Test System source and reference meter, the results of this calibration can be shown. More information can be found by visiting the MTE Meter Test Equipment website. The CDB5484U connections are as follows: 1.
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AN366REV2 UART to PC Controller DUT Supply Line Reference Optical Connection Reference Meter Rogowski Sensor USB to PC Controller Current Inputs AC Source MTE Meter Test Eq uipment AG PTS 400.3 Modu lar Portable Test System Voltage Inputs Pulse to Optical Counter Figure 13.
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AN366 6.1 Normal Operation Flow Diagram Using the CDB5484 The following flow diagram shows the implementation of normal flow executed in the field. The CDB5484U is used to load calibration constants obtained during the factory calibration. Obviously, the GUI is not used during actual execution, but it provides an excellent debugger for customer flow evaluation and modifications. The onetime factory calibration and compensation flows are discussed after the normal flow.
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AN366 1 2 RESTORE REGISTERS Various configurations include writes to registers (see Figure 14): RESTORE CONFIGURATIONS 3 AN366REV2 Config 0 Register SDI = 0x80 0x40 SDO = 0xFF 0xFF SDI = 0x80 0x00 SDO = 0xFF 0xFF 0x400000 0xFFFFFF 0xFFFFFF 0x400000 Write Register Config0 (Page 0, Register 0) Read Register Config0 (Page 0, Register 0) Config 1 Register SDI = 0x80 0x41 SDO = 0xFF 0xFF SDI = 0x80 0x01 SDO = 0xFF 0xFF 0x10FEE0 0xFFFFFF 0xFFFFFF 0x10FEE0 Write Register Config1 (Page 0, Register 1) Re
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AN366 3 4 RESTORE GAIN CONFIGURATION (See Figure 15.) Gain Channel 1, Volt. SDI = 0x90 0x63 SDO = 0xFF 0xFF SDI = 0x90 0x23 SDO = 0xFF 0xFF From NVM RESTORE GAIN CONFIGURATION 0x401BE3 0xFFFFFF 0xFFFFFF 0x401BE3 Write Register V1 Gain (Page 16, Register 35) Read Register V1 Gain (Page 16, Register 35) Gain Channel 1, Curr.
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AN366 5 6 RESTORE OFFSET CONFIGURATION (See Figure 15.) From NVM RESTORE OFFSET CONFIGURATION 7 AN366REV2 DC Offset Channel 1, Volt. SDI = 0x90 0x62 0x000000 SDO = 0xFF 0xFF 0xFFFFFF SDI = 0x90 0x22 0xFFFFFF SDO = 0xFF 0xFF 0x000000 Write Register V1 DC Offset (Page 16, Register 34) Read Register V1 DC Offset (Page 16, Register 34) DC Offset Channel 1, Curr.
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AN366 7 8 RESTORE NO LOAD CONFIGURATION (See Figure 15.
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AN366 9 10 VALID REGISTER CHECKSUM? Read register checksum and compare to stored value in NVM (see Figure 17). SDI = 0x90 SDO = 0xFF VALID REGISTER CHECKSUM ? 0x01 0xFFFFFF 0xFF 0x5C0ED4 Read Register Checksum (Page 16, Register 1) NO YES Figure 17.
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AN366 11 START CONTINUOUS CONVERSION (See Figure 18.) SDI = 0xD5 Send Continuous Conversion Command START CONTINUOUS CONVERSION 0xD5 Figure 18. Conversion Window WAIT FOR TSETTLE TIME Wait for Tsettle time.
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AN366 12 13 CLEAR DRDY in INTERRUPT STATUS SDI = 0x80 0x57 0x800000 Write DRDY Interrupt in Status 0 SDO = 0xFF 0xFF 0xFFFFFF (Page 0, Register 23) CLEAR DRDY READ IRMS, VRMS PAVG (See Figure 19.
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AN366 14 15 Figure 19. Conversion Window CALCULATE VOLTS, AMPS, AND WATTS Channel 1 AMPS1 = HEX2DEC(I1RMS) / 0xFFFFFF / 0.6  FS_Current VOLTS1 = HEX2DEC(V1RMS) / 0xFFFFFF / 0.6  FS_Voltage CALCULATE VOLTS = FS_Voltage  (VRMS/0.6) AMPS = FS_Current  (VRMS/0.6) WATTS = FS_Scale_Power  (VRMS/0.36) If (P1AVG ≤ 0x7FFFFF) Then WATTS1 = HEX2DEC(P1AVG) / 0x7FFFFF / 0.36  FS_Power Else WATTS1 = (HEX2DEC(P1AVG) - 0xFFFFFF) / 0x7FFFFF / 0.36  FS_Power Channel 2 AMPS2 = HEX2DEC(I2RMS)/0xFFFFFF / 0.
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AN366 6.2 Main Calibration Flow Diagram Using the CDB5484 The following flow diagram shows the implemented of gain calibration using the CDB5484U and a PC as the controller. The MTE source is used to provide the source voltage and load current. Each step of the flow shows the CDB5484 GUI screen capture of execution and reading results. The register writes and reads are all identified for easy compares to the GUI screen.
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AN366 1 2 SINGLE CONVERSION The register checksum is computed each time a conversion is completed (Single or Continuous). (See Figure 21.) SDI = 0xD4 Send Single Conversion Command SINGLE CONVERSION Figure 21. Conversion Window VALID REGISTER CHECKSUM TEST PC/Controller tests if valid checksum is received (see Figure 22). SDI = 0x90 SDO = 0xFF VALID RESET REGISTER CHECKSUM ? 0x01 0xFFFFFF 0xFF 0x46ECA1 Read Register Checksum NO YES 3 Figure 22.
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AN366 3 ENABLE HIGH PASS ON VOLTAGE AND CURRENT (See Figure 23.) SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x40 0xFF 0x00 0xFF 0x0602AA 0xFFFFFF 0xFFFFFF 0x0602AA Write Register Config2 to enable HPFs Read Register Config2 to enable HPFs ENABLE HIGH PASS FILTER Figure 23.
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AN366 APPLY FULL-SCALE VOLTAGE TO SOURCE (See Figure 24.) 4 APPLY FULLSCALE (FS) VOLTAGE TO SOURCE PF=1 PERFORM PHASE COMPENSATION Figure 24. Meter Test Equipment See Non-full-scale Gain Calibration on page 9. FULL LOAD AVAILABLE PC/Controller knows if full load or partial load is available (see Figure 25 for partial load). SDI = 0x92 SDO = 0xFF SDI = 0x92 SDO = 0xFF FULL LOAD AVAILABLE ? 0x7F 0xFF 0x3F 0xFF 0x200000 0xFFFFFF 0xFFFFFF 0x200000 Write Scale 0.25 Read Scale 0.
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AN366 5 6 SET TSETTLE (See Figure 26.) SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x79 0xFF 0x39 0xFF 0x001F40 0xFFFFFF 0xFFFFFF 0x001F40 Write TSETTLE = 2000ms (Page 16, Register 57) Read TSETTLE = 2000ms (Page 16, Register 57) Tsettle = 2000 ms Figure 26. Setup Window SET SAMPLE COUNT (See Figure 27.
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AN366 7 8 START CONTINUOUS CONVERSION (See Figure 28.) SDI = 0xD5 SDO = 0xFF Write Continuous Conversion START CONTINUOUS CONVERT 0xD5 Figure 28. Conversion Window START CONTINUOUS CONVERSION (See Figure 28.) READ IRMS, VRMS, PAVG, QAVG, PF 9 34 10 Channels 1 and 2, Current SDI = 0x90 0x06 0xFFFFFF SDO = 0xFF 0xFF 0x9AC11C SDI = 0x90 0x0C 0xFFFFFF SDO = 0xFF 0xFF 0x9ABB62 Read I1RMS (0.604509151) Read I2RMS (0.
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AN366 9 10 IS PF=1? PC/Controller tests if PF returned is 1. IS PF = 1 ? NO YES STOP CONVERSIONS (See Figure 29.) SDI = 0xD8 SDO = 0xFF Write Halt Conversion STOP CONVERSIONS 0xD8 Figure 29. Conversion Window CLEAR DRDY CLEAR DRDY in INTERRUPT STATUS SDI = 0x80 0x57 0xFFFFFF Write INT STATUS DRDY (page 0, register 23) SDO = 0xFF 0xFF 0x800000 (Set DRDY INT) SEND AC GAIN CALIBRATION (See Figure 30.
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AN366 11 DRDY SET ? NO YES CHECK STATUS OF DRDY SDI = 0x80 0x17 0xFFFFFF SDO = 0xFF 0xFF 0x4XXXXX Read INT STATUS DRDY (page 0, register 23) (DRDY not Set) SDI = 0x80 SDO = 0xFF Read INT STATUS DRDY (page 0, register 23) (DRDY Set) 0x17 0xFFFFFF 0xFF 0xCXXXXX READ POWER REGISTERS (See Figure 31.) READ IRMS, VRMS, PAVG, PSUM, QSUM, SSUM SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x06 0xFF 0x0C 0xFF 0xFFFFFF 0x40081D 0xFFFFFF 0x40086D Read I1RMS (0.2501238) Read I2RMS (0.
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AN366 12 PERFORM AC OFFSET AND READ IRMS PERFORM AC OFFSET & READ IRMS Note: AC offset is only required when IRMS measurements are needed with high dynamic range (only helpful at very low input levels).AC Offset Calibration Flow Diagram on page 44 SET SAMPLE COUNT (See Figure 32.
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AN366 13 Figure 33. Calibration Window FULL LOAD AVAILABLE ? CHECK IF FULL LOAD IS AVAILABLE PC/Controller knows if full load or partial load set. The following step is not require if full load is used. (See Figure 34.) NO YES SET SCALE REGISTER 0.6 SDI = 0x92 SDO = 0xFF 0x7F 0x4CCCCC 0xFF 0xFFFFFF Write Scale 0.6 SDI = 0x92 SDO = 0xFF 0x3F 0xFFFFFF 0xFF 0x4CCCCC Read Scale 0.6 Figure 34.
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AN366 14 15 COMPUTE CALIBRATED REGISTER CHECKSUM The register checksum is computed each time a conversion is completed (Single or Continuous). If no register have changed the user needs only read the checksum register after prior conversion. But if a register has been updated (Scale for example) then the user must perform another conversion before the read (see Figure 35).
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AN366 6.2.1 Phase Compensation Flow Diagram The following flow diagram shows the implemented of phase compensation using the CDB5484U and a PC as the controller. The MTE Meter Test Equipment source is used to provide the source voltage and load current with a 60º phase shift (PF = 0.5). Each step of the flow shows the CDB5484 GUI screen capture of execution and reading results. The register writes and reads are all identified for easy compares to the GUI screen.
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AN366 1 STOP CONVERSIONS (See Figure 37.) STOP CONVERSIONS 0xD8 Shown In Main Flow READ PF CALCULATE PHASE OFFSET = arccos(PF)-60º SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x15 0xFF 0x19 0xFF 0xFFFFFF 0x410F40 0xFFFFFF 0x4106A8 Read PF1 (0.508278) Read PF2 (0.5080157) (page 16, register 21) (page 16, register 25) For 1 to Count { PF1SUM = PF1SUM + PF1 PF2SUM = PF2SUM + PF2} Figure 37. Conversion Window PF1AVG = PF1SUM ÷ Count PF2AVG = PF1SUM ÷ Count PHASE1_OFFSET = ARCCOS(0.
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AN366 PHASE OFFSET PC/Controller test for phase calibration range meet or fail meter. This example shows negative phase offset. 2 8.99º @ 50Hz 10.79º @ 60Hz ±10.79º @ 60Hz -8.99º < PHASE OFFSET < +8.99º ? (50Hz) 4.5º @ 50Hz 5.4º @ 60Hz NO FAIL METER YES PHASE OFFSET NEGATIVE? 0º Before Calibration V is delayed from I Delay added to I Example Location YES -4.5º @ 50Hz -5.4º @ 60Hz -8.99º @ 50Hz -10.79º @ 60Hz Figure 38. Negative Phase Offset 0 to 512 · 0.010547 @ 60Hz -512 · 0.
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AN366 3 ACCUMULATE MULTIPLE PF READING AND CONFIRM (See Figure 39.) ACCUMULATE MULTIPLE PF READING AND CONFIRM PF = 0.5 SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x15 0xFF 0x19 0xFF 0xFFFFFF 0x410F40 0xFFFFFF 0x4106A8 Read PF1 (0.508278) Read PF2 (0.5080157) (page 16, register 21) (page 16, register 25) For 1 to Count { PF1SUM = PF1SUM + PF1 PF2SUM = PF2SUM + PF2} PF1AVG = PF1SUM ÷ Count PF2AVG = PF1SUM ÷ Count Figure 39.
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AN366 6.2.2 AC Offset Calibration Flow Diagram The following flow diagram shows the implemented of AC offset calibration using the CDB5484U and a PC as the controller. The MTE Meter Test Equipment source is used to provide the source voltage and no load current. Each step of the flow shows the CDB5484 GUI screen capture of execution and reading results. The register writes and reads are all identified for easy compares to the GUI screen. REMOVE LOAD CURRENT (See Figure 40.
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AN366 1 SEND AC OFFSET CALIBRATION (See Figure 41.) SDI = 0xF6 SDO =0xFF SEND AC OFFSET CALIBRATION 0xF6 Write AC Offset Calibration – All Channels Figure 41.
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AN366 2 READ POWER REGISTERS Reading IRMS is shown in main flow (see Figure 42). SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x25 0xFF 0x2C 0xFF 0xFFFFFF 0x050704 0xFFFFFF 0x049959 Read I1ACOFF (0.0392766) Read I2ACOFF (0.0359298) (page 16, register 37) (page 16, register 44) READ IRMS, IACOFF IACOFF = 0? Figure 42. Conversion Window YES PC/Controller tests for change in IACOFF register to check for success. NO RETURN IACOFF to MAIN FLOW CHECK INPUT OR FAIL AC OFFSET CALIBRATION COMPLETE 6.2.
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AN366 6.2.4 No Load Offset Compensation Flow Diagram The following flow diagram shows the implemented of no load power offset compensation using the CDB5484U and a PC as the controller. The MTE Meter Test Equipment source is used to provide the source voltage and no load current. Each step of the flow shows the CDB5484 GUI screen capture of execution and reading results. The register writes and reads are all identified for easy compares to the GUI screen.
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AN366 1 ACCUMULATE MULTIPLE PAVG, QAVG READINGS (See Figure 44.) Channels 1 and 2, Active Power SDI = 0x90 0x05 0xFFFFFF SDO = 0xFF 0xFF 0xFFFFFC SDI = 0x90 0x0B 0xFFFFFF SDO = 0xFF 0xFF 0xFFFFFF Read P1AVG (-0.00000048) Read P2AVG (-0.00000012) (page 16, register 5) Channels 1 and 2, Reactive Power SDI = 0x90 0x0E 0xFFFFFF SDO = 0xFF 0xFF 0xFFFFFE SDI = 0x90 0x10 0xFFFFFF SDO = 0xFF 0xFF 0xFFFFFC Read Q1AVG (-0.00000024) Read Q2AVG (-0.
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AN366 2 NEGATE PAVG & STORE IN POFF NEGATE QAVG & STORE IN QOFF SET POFF AND QOFF Negate PAVG and QAVG registers and store in POFF and QOFF respectively (see Figure 44). SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x64 0xFF 0x24 0xFF 0xFFFFFF 0x000003 0xFFFFFF 0x000003 Write P1OFF (3.57628E-07) Read P1OFF (3.57628E-07) (page 16, register 36) SDI = 0x90 SDO = 0xFF SDI = 0x90 SDO = 0xFF 0x6B 0xFF 0x2B 0xFF 0xFFFFFF 0x000001 0xFFFFFF 0x000001 Write P2OFF (1.19209E-07) Read P2OFF (1.
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AN366 Revision History Revision Date Changes REV1 APR 2012 Initial release. REV 2 MAY 2012 Corrected typographical errors. Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to http://www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable.