Manual
Table Of Contents
- AN118: Interfacing the CS5521/22/23/24/28 to the 80C51
- TABLE OF CONTENTS
- 1. INTRODUCTION
- 2. ADC DIGITAL INTERFACE
- 3. SOFTWARE DESCRIPTION
- 4. MAXIMUM SCLK RATE
- 5. DEVELOPMENT TOOL DESCRIPTION
- 6. CONCLUSION
- 7. APPENDIX: 80C51 MICROCONTROLLER CODE

AN118
10 AN118REV2
sbit SCLK = 0x93 ; /* Serial Clock */
sbit A1 = 0x94 ; /* Latch Input */
sbit A0 = 0x95 ; /* Latch Input */
sbit RESET = 0xA3;
sbit COMM = 0xA2;
sbit GAIN_CAL = 0xA1;
sbit OFFSET_CAL = 0xA0;
sbit TEST_BIT1 = 0xB2;
sbit TEST_BIT2 = 0xB3;
sbit TEST_BIT3 = 0xB4;
sbit MODE = 0x80;
sbit CTRL3 = 0x83;
sbit CTRL2 = 0x84;
sbit CTRL1 = 0x85;
/* BIT Register */
/* PSW */
sbit CY = 0xD7;
sbit AC = 0xD6;
sbit F0 = 0xD5;
sbit RS1 = 0xD4;
sbit RS0 = 0xD3;
sbit OV = 0xD2;
sbit P = 0xD0;
/* TCON */
sbit TF1 = 0x8F;
sbit TR1 = 0x8E;
sbit TF0 = 0x8D;
sbit TR0 = 0x8C;
sbit IE1 = 0x8B;
sbit IT1 = 0x8A;
sbit IE0 = 0x89;
sbit IT0 = 0x88;
/* IE */
sbit EA = 0xAF;
sbit ES = 0xAC;
sbit ET1 = 0xAB;
sbit EX1 = 0xAA;
sbit ET0 = 0xA9;
sbit EX0 = 0xA8;
/* IP */
sbit PS = 0xBC;
sbit PT1 = 0xBB;