Operation Guide

OG_LMD-401_v10e Circuit Design, Inc. 5
OPERATION GUIDE
Receiver part
Item MIN TYP MAX Remarks
Receiver type Double superheterodyne
1st IF frequency MHz 21.7
2nd IF frequency kHz 450
Maximum input level dBm 10
BER (0 error/2556 bits)
*1
dBm -113 PN 9 4800bps
BER (1 % error)
*2
dBm -116 PN 9 4800bps
Sensitivity 12dB/ SINAD dBm -116 fm1 k/ dev 2.4 kHz CCITT
Co-channel rejection dB -7 D/U ratio
Spurious response rejection dBm -44 1 st Mix, 2 nd Mix, 2 signal method
Adjacent CH selectivity dBm -50 +/- 12.5 kHz, 2 signal method
Adjacent CH saturation dBm -20 +/- 12.5 kHz, 2 signal method
Blocking dBm -20
+/-2 MHz, +/-10MHz, +/-5%
2 signal method
DO output level V 2.8 L = GND H = 2.8 V
RSSI rising time ms
30 50 CH shift of 25 kHz (from PLL setup)
50 70 When power ON (from PLL setup)
Time until valid Data-out
*3
ms
50 100 CH shift of 25 kHz (from PLL setup)
70 120 When power ON (from PLL setup)
Spurious radiation (1
st
Lo) dBm -60 -57 Conducted 50 Ω
RSSI mV
260 310 360 With –100 dBm
190 240 290 With –110 dBm
Specifications are subject to change without prior notice
Notice
 The time required until a stable DO is established may get longer due to the possible frequency drift
caused by operation environment changes, especially when switching from TX to RX, from RX to TX and
changing channels. Please make sure to optimize the timing. The recommended preamble is more than
20 ms.
 Antenna connection is designed as pin connection.
 RF output power, sensitivity, spurious emission and spurious radiation levels may vary with the pattern
used between the RF pin and the coaxial connection. Please make sure to verify those parameters
before use.
 The feet of the shield case should be soldered to the wide GND pattern to avoid any change in
characteristics.
Notes about the specification values
*1 BER: RF level where no error per 2556 bits is confirmed with the signal of PN9 and 4800 bps.
*2 BER (1 % error) : RF level where 1% error per 2556 bits is confirmed with the signal of PN9 and 4800 bps.
*3 Time until valid Data-out : Valid DO is determined at the point where Bit Error Rate meter starts detecting
the signal of 4800 bps, 1010 repeated signal.
All specifications are specified based on the data measured in a shield room using the PLL setting controller
board prepared by Circuit Design.