User's Manual

7/9 Version 1.1
ඔ
碁
ઝݾٝڶૻֆ׹
No. 10-1 , Li-hsin Road I
Science-based Industrial Park ,
Hsinchu 300,Taiwan, R.O.C.
Tel: [phone]
Fax: [phone]
Web site: www.wneweb.com
3.3 Suggestion:
All interface of Host to MAC/BB (control pin, address bus, data bus…) need to add
tri-state buffers in system side. To avoid the latch-up appearance this method should be
implemented.
For Example:
Signal Pin Number Total Pins
RF_VCC 1,2,3,4 4
Control
signals
27,29,31,33,35,37,41,42,43,44,45,46,47,48,50 15
Address
Bus
5,7,9,11,13,15,17,19,21,23 10
Data Bus 6,8,10,12,14,16,18,20,24,26,28,30,32,34,36,38 16
Buffer IC
Control
Signals
PDA
Host
System
Control
Signals
WLAN
CF
module
Buffer IC
Address
Bus
Address
Bus
Buffer IC
Data
Bus
Data
Bus
Regulator
(500mA@3.3V)
RF_VCC
WLAN
POWER
SWITCH
Buffer_EN#
Buffer_EN#
Buffer_EN#