Specifications

Table Of Contents
Cinterion
®
PLSx3 Hardware Interface Description
2.1 Application Interface
66
t PLSx3_HID_v01.002d 2021-08-24
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Page 39 of 129
The following figure shows the startup behavior of the GPIO interface.
Figure 14: GPIO startup behavior
EMERG_RST
V180
GPIO1,4,5,6
Reset State
PD
Internal Reset
GPIO3
Low
Start up
Power supply active
Firmware
Initialization
Command Interface
Initialization
Interface Active
GPIO2,16
PD
GPIO7,8,11-15
PD
PD
GPIO17-18
PU
GPIO20,26
PD
GPIO21,24
IGT
PD
PD
VCORE
PD
PD
PD
PD
GPIO19
OH