Specifications

Cinterion
®
EHS5-E/EHS5-USR4 Hardware Interface Overview
2.1 Application Interface
28
 ehs5_hio_v04.000 2019-01-16
Confidential / Preliminary
Page 18 of 46
2.1.8 SPI Interface
Four EHS5-E/EHS5-USR4 GPIO interface lines can be configured as Serial Peripheral
Interface
(SPI). The SPI is a synchronous serial interface for control and data transfer between EHS5-
E/EHS5-USR4 and the external application. Only one application can be connected to the SPI
and the interface supports only master mode. The transmission rates are up to 6.5Mbit/s. The
SPI interface comprises the two data lines MOSI and MISO, the clock line SPI_CLK a well as
the chip select line SPI_CS.PWM Interfaces
The GPIO6 and GPIO7 interface lines can be configured as Pulse Width Modulation (PWM)
interface lines PWM1 and PWM2. The PWM interface lines can be used, for example, to con-
nect buzzers. The PWM1 line is shared with GPIO7 and the PWM2 line is shared with GPIO6
(for GPIOs see Section 2.1.6). GPIO and PWM functionality are mutually exclusive.
2.1.9 PWM Interfaces
The GPIO6 and GPIO7 interface lines can be configured as Pulse Width Modulation (PWM)
interface lines PWM1 and PWM2. The PWM interface lines can be used, for example, to con-
nect buzzers. The PWM1 line is shared with GPIO7 and the PWM2 line is shared with GPIO6
(for GPIOs see Section 2.1.6). GPIO and PWM functionality are mutually exclusive.
2.1.10 Pulse Counter
The GPIO8 line can be configured as pulse counter line COUNTER. The pulse counter inter-
face can be used, for example, as a clock (for GPIOs see Section 2.1.6).
2.1.11 Status LED
The GPIO5 interface line can be configured to drive a status LED that indicates different oper-
ating modes of the module (for GPIOs see Section 2.1.6). GPIO and LED functionality are mu-
tually exclusive.
2.1.12 Fast Shutdown
The GPIO4 interface line can be configured as fast shutdown signal line FST_SHDN. The con-
figured FST_SHDN line is an active low control signal and must be applied for at least 10 mil-
liseconds. If unused this line can be left open because of a configured internal pull-up resistor.