Specifications

CINTERION

BGS12 Hardware Interface Description

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BGS12 HID_V00.915

Confidential / Released

2019

Table 9 for a summary of all modes.

The CYCLIC SLEEP mode is a dynamic process which alternatingly enables and disables the

serial interface. By setting/resetting the CTS signal, the module indicates to the application

whether or not the UART is active. The timing of CTS is described below.

Both the application and the module must be configured to use hardware flow control (RTS/

CTS handshake). The default setting of BGS12 is AT\Q0 (no flow control) which must be

altered to AT\Q3. See [1] for details.

Note: If both serial interfaces ASC0 and ASC1 are connected, both are synchronized.

This means that SLEEP mode takes effect on both, no matter on which interface the

AT command was issued. Although not explicitly stated, all explanations given in this

section refer equally to ASC0 and ASC1, and accordingly to CTS0 and CTS1.

3.4.4 CYCLIC SLEEP Mode AT+CFUN=9

Mode AT+CFUN=9 is similar to AT+CFUN=7, but provides two additional features:

•

The time the module stays active after RTS was asserted or after the last character was

sent or received, can be configured individually using the command AT^SCFG. Default

setting is 2 seconds like in AT+CFUN=7. The entire range is from 0.5 seconds to 1 hour,

selectable in tenths of seconds. For details see [1].

•

RTS0 and RTS1 are not only used for flow control (as in mode AT+CFUN=7), but also

cause the module to wake up temporarily. See Section 3.4.7.1 for details.