Specifications

Cinterion
®
ELS81-US Hardware Interface Description
Figures
118
 els81-us_hid_v01.004 2017-09-27
Confidential / Preliminary
Page 7 of 107
Figures
Figure 1: ELS81-US system overview........................................................................... 12
Figure 2: ELS81-US block diagram............................................................................... 13
Figure 3: ELS81-US RF section block diagram............................................................. 14
Figure 4: Numbering plan for connecting pads (bottom view)....................................... 15
Figure 5: USB circuit ..................................................................................................... 24
Figure 6: Serial interface ASC0..................................................................................... 26
Figure 7: ASC0 startup behavior................................................................................... 27
Figure 8: Serial interface ASC1..................................................................................... 28
Figure 9: ASC1 startup behavior................................................................................... 29
Figure 10: External UICC/SIM/USIM card holder circuit ................................................. 31
Figure 11: SIM interface - enhanced ESD protection...................................................... 32
Figure 12: RTC supply variants....................................................................................... 33
Figure 13: GPIO startup behavior ................................................................................... 35
Figure 14: I
2
C interface connected to V180 .................................................................... 36
Figure 15: I
2
C startup behavior ....................................................................................... 37
Figure 16: Characteristics of SPI modes......................................................................... 38
Figure 17: Status signaling with LED driver .................................................................... 39
Figure 18: Power indication circuit .................................................................................. 40
Figure 19: Fast shutdown timing ..................................................................................... 41
Figure 20: Antenna pads (bottom view) .......................................................................... 44
Figure 21: Embedded Stripline with 65µm prepreg (1080) and 710µm core .................. 45
Figure 22: Micro-Stripline on 1.0mm standard FR4 2-layer PCB - example 1 ................ 46
Figure 23: Micro-Stripline on 1.0mm Standard FR4 PCB - example 2............................ 47
Figure 24: Micro-Stripline on 1.5mm Standard FR4 PCB - example 1............................ 48
Figure 25: Micro-Stripline on 1.5mm Standard FR4 PCB - example 2............................ 49
Figure 26: Routing to application‘s RF connector - top view........................................... 50
Figure 27: Schematic diagram of ELS81-US sample application.................................... 52
Figure 28: Sample level conversion circuit...................................................................... 53
Figure 29: Sample circuit for applying power using an external µC ................................ 56
Figure 30: ON circuit options........................................................................................... 57
Figure 31: ON timing ....................................................................................................... 58
Figure 32: Automatic ON circuit based on voltage detector - option 1............................ 58
Figure 33: Automatic ON circuit based on voltage detector - option 2............................ 59
Figure 34: Emergency restart timing ............................................................................... 60
Figure 35: Switch off behavior......................................................................................... 63
Figure 36: Power saving and paging in WCDMA networks............................................. 66
Figure 37: Power saving and paging in LTE networks.................................................... 67
Figure 38: Wake-up via RTS0......................................................................................... 68
Figure 39: Position of reference points BATT+ and GND ............................................... 72
Figure 40: ESD protection for RF antenna interface ....................................................... 74
Figure 41: EMI circuits..................................................................................................... 75
Figure 42: ELS81-US– top and bottom view................................................................... 78
Figure 43: Dimensions of ELS81-US (all dimensions in mm) ......................................... 79
Figure 44: Land pattern (top view) .................................................................................. 80
Figure 45: Recommended design for 110µm thick stencil (top view).............................. 81
Figure 46: Recommended design for 150µm thick stencil (top view).............................. 81
Figure 47: Reflow Profile................................................................................................. 83
Figure 48: Carrier tape .................................................................................................... 87
Figure 49: Reel direction ................................................................................................. 87
Figure 50: Barcode label on tape reel ............................................................................. 88