Specifications
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.2 RF Antenna Interface
- 2.3 Sample Application
- 3 Operating Characteristics
- 3.1 Operating Modes
- 3.2 Power Up/Power Down Scenarios
- 3.3 Power Saving
- 3.4 Power Supply
- 3.5 Operating Temperatures
- 3.6 Electrostatic Discharge
- 3.7 Blocking against RF on Interface Lines
- 3.8 Reliability Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
®
ELS81-US Hardware Interface Description
3.2 Power Up/Power Down Scenarios
77
els81-us_hid_v01.004 2017-09-27
Confidential / Preliminary
Page 58 of 107
Figure 31: ON timing
3.2.1.3 Automatic Power On
If an automatic power on function is required for module application, circuit shown in either
Figure 32 or Figure 33 is recommended.
Figure 32: Automatic ON circuit based on voltage detector - option 1
BATT+
ON
EMERG_RST
V180
VCORE
VDDLP
Rising edge only starts up the module
>100ms
Voltage Detector*
BATT+
BB
GND
ON
VDDLP
GND
* It is recommended to
apply the 3-pin microprocessor reset
monitor MAX803SQ293T1G or MAX803SQ293D3T1G
manufactured by ON Semiconductor.
Details please refer to www.onsemi.com
VCC RESET
GND
100nF Not Assembled
R1
10KOhm
R2
0Ohm