Specifications

Table Of Contents
Cinterion
®
ALAS5V Hardware Interface Description
1.4 Circuit Concept
16
ALAS5V_HID_v00.030a 2019-03-20
Confidential / Preliminary
Page 16 of 124
1.4 Circuit Concept
Figure 2 shows a block diagram of the ALAS5V module and illustrates the major functional
components:
Baseband block:
GSM/UMTS/LTE controller/transceiver/power supply
NAND/LPDDR2 memory devices
Application interface (SMT with connecting pads)
RF section:
RF transceiver
RF power amplifier/frontend
RF filter
GNSS receiver/Front end
Antenna pad
Figure 2: ALAS5V block diagram
LPDDR2SDRAM
2GBit
NANDFlash
4GBit
38.4MHz
PowerManagement
Basebandcontroller
RFpart
Clocks
LDO
LDO
LDO
LDO
LDO
S1
S2
S3
S4
S5
PMU
LB/MB /HB
PA
GSM
PA
Filter
&
Switches
QLINK RFFE
EBI1
EBI2
GRFC
BATT+
LGAPads
IGT
EMERGOFF
PWR_IND
USB 3.0
USB 2.0
ASC0
ASC1
I2C
2xPCM/I2S
I2S_MCLK
eMMC
2xSIM
GPIO
PCIe
4xADC
ADC
BATT+_RF
GND
ALAS5
ANT_MAIN
ANT_DRX_
MIMO
ANT_GNSS
GNSS_EN
ANT_GNSS_DC