User manual

RC200/203 Manual
www.celoxica.com Page 15
• Ethernet
• Clock generator
• Video input
• Video DAC
• RGB to PAL/NTSC encoder
• Audio codec
• RS-232
• PS/2 connectors
• Expansion header
• 2 seven-segment displays
• 2 blue LEDs
• 2 contact switches
• Bluetooth (if fitted)
• TFT Flat screen (if fitted)
• Touchscreen (if fitted)
Details of pin connections are given in the sections about these devices.

el-C, remember that the pins If you are programming the board using Hand
should be listed in reverse (descending) order.
The FPGA also has access to the parallel port and to the SmartMedia Flash memory
am the FPGA via the CPLD from the SmartMedia Flash memory, or from the
The RC
• ommunicates with the SmartMedia and PLL and is a
• peration: becomes parallel port master and drives all
ction of the other CPLD control lines changes, depending on whether P9 is high or
.
through the CPLD.
You can progr
parallel port.
4.4.1 FPGA operation modes
200 FPGA has two modes of operation:
normal operation: c
parallel port slave
parallel port control o
parallel port signals
The operation mode is set by control line P9 on the CPLD. If P9 is high, the FPGA is in
normal operation mode. If P9 is low, the FPGA is in parallel port control operation mode.
The fun
low