User manual

Tutorial: Using the logic estimator
struct _FirStruct
{
signed Input;
signed Output;
signed Coeffs[];
};
macro proc FirWrite (FirPtr, Data)
{
FirPtr->Input = Data;
}
macro proc FirRead (FirPtr, DataPtr)
{
*DataPtr = FirPtr->Output;
}
If an application for the FIR filter was unable to provide new input data or accept output data every cycle,
the interface structure could be modified to include an Enable register. All the code withing the body of
the FIR filter would then be put inside an
if...else block which checks the condition of the Enable
register on every cycle.
Shown below is the logic estimator summary for the
Version3 project from the TutorialFIR workspace,
which can be accessed from
Start>Programs>Celoxica>Platform Developer's Kit>Tutorials>TutorialFIR on the
Start Menu. This project contains the code for the Single Cycle FIR. The summary can be viewed by
building the project for EDIF, and opening
Summary.html in the folder
PDK/Tutorials/General/TutorialFIR/Version3/EDIF.
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