User manual

Tutorial: Using the logic estimator
When the coefficients are symmetrical, pairs of samples taken from the start and end of the series can
be added together, as shown in the figure below. The advantage of this is that the number of
multiplications required can be reduced by up to 50% (in this case it is now four, instead of the seven
required in the diagram above). This is important for a hardware implementation of an FIR filter as
multipliers require a significant amount of logic.
z
-1
z
-1
z
-1
z
-1
z
-1
z
-1
+ + +
Σ
h(0) h(1) h(2) h(3)
x(n)
y(n)
SYMMETRIC FIR BLOCK DIAGRAM
This tutorial will start with a software-like implementation of a FIR filter, and will proceed in three stages
to an efficient hardware implementation which can accept and generate a new data item every clock
cycle.
9.2 Initial version
The Initial version of the FIR can be found in the TutorialFIR workspace, in the project called Version1. To
open the workspace, select
Start>Programs>Celoxica>Platform Developer's Kit>Tutorials>TutorialFIR.
Open the
TutorialFIR workspace, and set Version1 as the active project. Within this project, open the
fir1.hcc file.
In
fir1.hcc, after setting up a clock and including the standard library header stdlib.hch, a structure
representing an interface to the FIR is defined. This structure contains variables which are used to pass
data in and out of the FIR, as shown below. The input and output registers also have a single bit
associated with each of them to signify if there is valid data present in the register. The
Coeffs[] array
holds the values of the FIR coefficients when the FIR filter is operating.
www.celoxica.com
Page 101