User manual

Tutorial: Using the logic estimator
9 FIR Tutorial
The FIR tutorial illustrates how to implement a FIR (Finite Impulse Response) filter using Handel-C,
starting with a software-style implementation and finishing with an efficient hardware implementation.
This tutorial will not cover the theory of FIR filters.
The
TutorialFIR workspace contains the code for each of the examples. To open the workspace, select
Start>Programs>Celoxica>Platform Developer's Kit>Tutorials>TutorialFIR.
A basic knowledge of Handel-C is assumed, and some knowledge of digital electronics and design
techniques will also be helpful. New users are recommended to work through the examples in order.
9.1 Introduction
A FIR (Finite Impulse Response) filter takes some number of historical input samples, multiplies each by
a coefficient, and sums the results. The figure below shows an example which takes the last 7 samples
of
x(n), multiplies them by the coefficients h(0) to h(6), and sums them, generating the result y(n).
For every new sample
x(n), a new result at y(n) will be generated. In a software implementation the
maximum sample rate of
x(n) will be dependant on the filter complexity and the performance of the
processor on which it is executed. When implemented in hardware the maximum performance is defined
by the clock rate at which the filter is run and the design of the filter.
z
-1
z
-1
z
-1
z
-1
z
-1
z
-1
Σ
h(0) h(1) h(2) h(3) h(4) h(5) h(6)
y(n)
x(n)
FIR BLOCK DIAGRAM
The coefficients of the FIR filter can be any value, but if they are symmetrical the implementation of the
filter can be made more efficient. An example of symmetric coefficients is shown below:
h(0) = 0.1, h(1) = 0.3, h(2) = 0.2, h(3) = 0.5, h(4) = 0.2, h(5) = 0.3, h(6) = 0.1
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