Specifications

RC200/203 PSL reference
6 Index
A
audio....................................................... 28, 55
audio clock 24
boosting input 55
gain level 55
hardware description 28
input source 55
output volume 56
reading from 55, 56
sample rate 56, 57
writing to 55, 57
B
Bluetooth................................................. 34, 57
hardware description 34
reading from 58
resetting 58
writing to 58
buttons and switches.............................. 33, 39
C
camera.......................................................... 33
clock generator ............................................. 24
CPLD ............................................................ 71
address bus 14
clock 15
connections to SmartMedia 22
control lines 14
data lines 14
enabling 71
parallel port interface 16
register map for FPGA 15
running 71
writing to FPGA 20
E
Ethernet .................................................. 26, 65
disabling 67
enabling 66
mode 67
reading from 67
resetting 67
writing to 69
expansion port pins.................................30, 73
Expert RC200 ...............................................36
F
FPGA ......................................................70, 72
operation modes 19
reading data from host PCPC 21, 73
reading from 21, 73
reconfiguring 19, 20, 70
register map in CPLD 15
SmartMedia access 22
writing data to FPGA 20, 73
writing data to host PC 21, 73
H
header files ...................................................36
J
JTAG chain ...................................................33
K
keyboard .......................................................43
reading from 43
writing to 44
L
LEDs .......................................................32, 38
M
mouse ...........................................................42
reading from 43
writing to 43
P
parallel port .............................................21, 72
access to SmartMedia 23
interface to CPLD 16
parallel port control mode 19, 21
reading from FPGA 21
writing to FPGA 21
Professional RC200......................................10
PS/2 ports ...............................................29, 42
R
RAM........................................................23, 40
read and write addresses 41
reading from 42
write address mask 41
writing to 42
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