Specifications

RC200/203 Manual
Contents
1 RC200/203 BOARD.................................................................................................... 8
2
RC200/203 OVERVIEW................................................................................................ 9
2.1 STANDARD KIT...................................................................................................... 9
2.2
PROFESSIONAL KIT ............................................................................................. 10
2.3
EXPERT KIT ........................................................................................................ 10
2.4
RC200/203 SUPPORT SOFTWARE........................................................................ 11
3
INSTALLATION AND SET-UP ........................................................................................ 12
4
HARDWARE DESCRIPTION .......................................................................................... 13
4.1 RC200/203 DEVICES .......................................................................................... 13
4.2
RC200/203 CONNECTORS .................................................................................. 14
4.3
CPLD 14
4.3.1 Control and data pins ............................................................................................................ 14
4.3.2 CPLD clock............................................................................................................................ 15
4.3.3 Register map in the CPLD for the FPGA .............................................................................. 15
4.3.4 CPLD / parallel port interface ................................................................................................ 16
4.4
FPGA 18
4.4.1 FPGA operation modes......................................................................................................... 19
4.4.2 Programming the FPGA using the FTU2 program................................................................ 19
4.4.3 Programming the FPGA from the parallel port...................................................................... 19
4.4.4 Programming the FPGA from SmartMedia ........................................................................... 20
4.4.5 Programming from a specific address in the SmartMedia: ................................................... 20
4.4.6 Reading data from the CPLD to the FPGA ........................................................................... 20
4.4.7 Writing data to the CPLD from the FPGA ............................................................................. 21
4.4.8 Transferring data between the FPGA and host..................................................................... 21
4.4.9 Using the FPGA in parallel port control mode....................................................................... 21
4.5
PARALLEL PORT ................................................................................................. 21
4.6
SMARTMEDIA FLASH MEMORY ............................................................................. 22
4.6.1 SmartMedia connections to the CPLD.................................................................................. 22
4.6.2 FPGA access of SmartMedia................................................................................................ 22
4.6.3 Parallel port access of SmartMedia ...................................................................................... 23
4.7
ZBT SRAM BANKS ............................................................................................ 23
4.8
CLOCK GENERATOR (PLL) .................................................................................. 24
4.8.1 Programming the PLL via the parallel port or FPGA............................................................. 25
4.9
ETHERNET.......................................................................................................... 26
4.10
VIDEO INPUT PROCESSOR .................................................................................. 26
4.11
VIDEO OUTPUT PROCESSORS ............................................................................. 27
4.11.1 Digital / Analogue converter ................................................................................................ 27
4.11.2 RGB to NTSC/PAL encoder................................................................................................ 28
4.11.3 TFT flat panel display.......................................................................................................... 28
4.12
AUDIO CODEC................................................................................................... 28
4.13
RS-232 SERIAL TRANSMISSION.......................................................................... 28
4.14
MOUSE AND KEYBOARD PS/2 PORTS.................................................................. 29
4.15
7-SEGMENT DISPLAYS ....................................................................................... 29
4.16
ATA / EXPANSION HEADER................................................................................ 30
4.17
LEDS .............................................................................................................. 32
4.18
CONTACT SWITCHES ......................................................................................... 32
4.19
RESET BUTTON ................................................................................................. 33
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