Specifications

STMicroelectronics STM32W108xB chip
This section applies if you are running SNAP on a STMicroelectronics STM32W108CB or
STM32W108HB chip. At the time of this writing there is no SNAP Engine or other Synapse module
based on this chip.
IO pins
The STM32W108CB supports 24 input/output pins, referenced as IO 0 through IO 23.
Port Pin SNAPpy IO Port Pin SNAPpy IO Port Pin SNAPpy IO
PA0 0 PB0 8 PC0 16
PA1 1 PB1 9 PC1 17
PA2 2 PB2 10 PC2 18
PA3 3 PB3 11 PC3 19
PA4 4 PB4 12 PC4 20
PA5 5 PB5 13 PC5 21
PA6 6 PB6 14 PC6 22
PA7 7 PB7 15 PC7 23
The STM32W108HB supports 24 IO, but only 18 of them are brought out to external pins due to the
smaller 40-pin package. The following table shows the pins that are not available for use if you use
the smaller package/lower pin count chip. For more details refer to the manufacturer’s datasheet.
Pin Name Functions SNAPpy IO Number
PA6 PA6, TIM1C3 6
PA7 PA7, TIM1C4, REG_EN 7
PB0 PB0, VREF, IRQA, TRACECLK, TIM1CLK, TIM2MSK 8
PB5 PB5, ADC0, TIM2CLK, TIM1MSK 13
PC6 PC6, OSC32B, TX_ACTIVE* 22
PC7 PC7, OSC32A, OSC32EXT 23
VDD_PADS N/A
VDD_SYNTH N/A
The remainder of this document will present the chip-specific details in a “STM32W108CB-centric”
fashion.
Wakeup pins
All 24 pins, IO 0 through IO 23, can be configured to wake the chip from sleep. Note that these pins
automatically wake the chip on any transition, there is no notion of “configurable polarity” on this
particular hardware.
To repeat – wakeup polarity on the STM32W108 is not under software control.
Page 186 of 202 SNAP Reference Manual Document Number 600-0007K