Specifications

Built-in function readAdc()
The reference voltage is 3.3 volts. In addition to the 10-bit ADC channels listed in the Port Mappings
table, readAdc(27) can provide a reading of an internal temperature sensor in the module, and
readAdc(28) can provide an indication of voltage supply. (readAdc(28) requires additional
pokes to enable the reading. Refer to the Silicon Labs documentation for more details.)
You can also choose to scale your ADC readings to 1.65 volts. To do so, poke(-0xE8, 0x80) to enable
the ADC and then poke(-0xBC, 0x1B) to set the ADC to a 6.075 MHz sample clock that samples on
demand on a 1.65 volt scale. Refer to the Si100x documentation for further details.
Built-in function setPinPullup():
Built-in function setPinPullup() has no effect on any pin except pin 17 (radio GPIO_0). If you
need to establish pin pull-ups, you can poke(-0xE3, 0x40) to set the pull-up on pins 0-16. Use
poke(-0xE3, 0xC0) to disable the pull-ups. You cannot set a pull-up on an individual pin.
Built-in function setPinSlew():
Built-in function setPinSlew() has a different purpose on the Si100x builds. Rather than controlling
the slew rate for a pin, it controls the strength at which the pin can drive an output signal. The default
setting (False) provides a standard output signal strength. Calling setPinSlew(pin, True) allows the
module to push more current through the pin, which may be necessary for some applications (such as
driving a relay).
Built-in function setRadioRate():
On the Si100x, setRadioRate() has no effect. Only the standard 150 Kbps rate is supported.
Built-in function setSegments():
On the Si100x, setSegments() has no effect.
Built-in function sleep():
The Si100x supports four sleep modes. Modes 0 and 1 require the presence of an external 32kHz
crystal to regulate your sleep timing. Using these modes with no crystal present will “hang” the node.
Modes 2 and 3 should be used when there is no external crystal present, and will “hang” the node if
the crystal is present. Modes 0 and 2 provide a slightly “deeper” sleep (lower power consumption)
than modes 1 and 3. However modes 0 and 2 require an additional 300 ms to wake up, and do not
maintain state for IO17 or IO18 while sleeping.
If a crystal is present, the first timed sleep executed after a node boots requires approximately 80
milliseconds of additional configuration time to initialize the clock. Subsequent timed sleeps will not
have this overhead.
Page 170 of 202 SNAP Reference Manual Document Number 600-0007K