Specifications

Silicon Labs Si100x
In addition to RF300 and RF301 modules built on the SNAP Engine footprint, you will find SNAP
running on Silicon Labs Si100x chips. (See the following section for details unique to the
RF300/RF301 on the SNAP Engine form factor.)
There are two versions of the Si100x firmware: One version provides frequency hopping in the 900
MHz range, and the other provides service in the 868 MHz range. Details below refer to both versions
of the firmware except where explicitly specified as different.
IO pins
The Si100x supports 19 output pins. 18 of these can be input pins.
Wakeup pins
Nine of the 19 IO support a hardware “wakeup” capability. see IO 1-8.
Analog inputs
Seventeen of the 19 IO can be used as analog inputs. See IO 0-15 and 17.
UART0
Four pins support UART 0, see IO 1-4. If you do not need RTS/CTS signals, then IO 1 and 2 are
available for other usage. For serial connections, the UART is more restricted than on some other
platforms. The only serial configurations available are 8N1 and 8N2.
UART1
There is only one UART (UART 0) available on the Si100x. Any call to initUart() that
references UART 1 will be applied to UART 0 instead.
SPI
Three pins can optionally be used for SPI, see IO 6-8.
NOTE – these are not hardware SPI pins. SNAPpy SPI is done via software emulation.
You will also need one “SPI Chip Select” pin per external SPI device. Any available IO pin can be
used for this purpose.
I
2
C
Two pins can optionally be used for I
2
C. see IO 10 and 11.
NOTE – these are not hardware I
2
C pins. SNAPpy I
2
C is done via software emulation.
PWM
Six pins can optionally be used as Pulse Width Modulation (PWM) outputs. The pins are user-
configurable.
Serial rates
The lowest serial data transfer rate supported is 889 baud.
The table on the following page summarizes the IO mapping on the Si100x chip.
SNAP Reference Manual Document Number 600-0007K Page 165 of 202