Specifications

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10-8. Operation program ROM pin descriptions (µPD23C2001EGW342)
Pin No. Name In/Out Status Status Description
of OFF of ON
2, 4~6, 9~13, A0~A14 In L Pulse Address bus line (A0~A14)
15~18
21~23, 25~29 D1~D8 In/Out L Pulse Data bus line (IO0~IO7)
24 GND In L L GND terminal
31 CSB In H Pulse Chip select signal
1 OEB In H Pulse Read signal from CPU
7 WEB In H Pulse Write signal from CPU
8 VCC In H H VDD terminal
1,30,31 NC - L +5V Connected to VCC
2~12, 23, A0~A16 In L Pulse Address bus line (A0~A14,RA15,RA16)
Pin No. Name In/Out Status Status Description
of OFF of ON
25~29
13~15, 17~21 IO0~IO7 Out L Pulse Data bus line (IO0~IO7)
16 GND Power GND GND GND terminal
22 CE In L Pulse Chip selection terminal
24 OE In L Pulse Output enable terminal
32 VCC Power L +5V VCC terminal
10-9. RAM pin descriptions (µPD43256AGU-10/12/15LL)