Specifications

CONSTRUCTION
SMART CLAP SWITCH
LOKESH KUMATH
C
ircuit of a smart clap switch, in-
corporating certain unique fea-
tures, is presented here. It over-
comes the shortcomings observed in nor-
mal clap switches. The following two spe-
cial features, which you would not have
observed in other clap switches, are in-
cluded in its design:
(a) It comprises a 4x4 clap switch, i.e.
it operates only when you clap four times
to switch ‘on’ a device. Similarly, for
switching ‘off’ the device, you are required
to again clap four times.
(b) The clapping should occur within
an interval of about 3.5 seconds, other-
wise the clap switch status will remain
unchanged.
In a simple clap switch, the connected
device is switched ‘on’ by a single clap
and is switched ‘off’ in a similar manner
by a single clap. Since the transducer used
in a clap switch is normally a condenser
mic, it is unable to detect difference be-
tween a clap and a sound produced when
a metallic object falls to the ground or
simply the sound of a shouting person.
This is a common problem in clap
switches.
In the circuit of the smart clap switch,
this problem is completely eliminated.
Thus, it will not be affected by any spuri-
ous sound, including the one produced
when a door is strongly banged. This can
be well understood from the working of
the circuit explained below.
The circuit
230V AC is converted into 12V regulated
DC supply using 15-0-15,1A secondary,
step-down transformer and other related
components. Since CMOS ICs are used in
the circuit, its power consumption is quite
low and the noise immunity of the circuit
is high (about 5.4V).
Resistor R1 biases the condenser mi-
crophone and the electrical signals (con-
verted from sound waves) are fed to
buffer stage N1 with high input imped-
ance. The high-frequency noise signals are
bypassed to ground by shunting the mi-
crophone with capacitor C1. The mic out-
put is fed to a preamplifier stage built
around op-amp N2. The gain of preampli-
fier stage is 6.6.
The next stage comprising capacitor
C4 and resistor R6 constitutes a high-pass
filter with a cut-off frequency of about 3
kHz. This filter avoids false activation of
the switch by spurious low-frequency
sounds such as those produced by a fan,
a motorcycle, and other gadgets. Although
this precaution may not be absolutely es-
sential because we are using a coded
sound, it provides additional safety.
The high-pass filter stage is followed
by an amplifier stage around op-amp N3
with a gain of 23. Thus, the overall gain
of the op-amps N2 and N3 is about 150,
which is quite adequate.
The next stage formed using op-amp
N4 is a comparator. The reference volt-
age connected to the inverting terminal
of the comparator can be varied, from
about 0.2V to about 8V, by adjusting pre-
set VR1. Thus, the sensitivity to clap
sound can be set by preset VR1. The red
LED D1 gives an indication that the clap
signal has been detected.
[Note: IC6 (NE555), configured as a
monostable, with a pulse width of 250 ms,
has been added at EFY lab during the
course of testing, to eliminate the effect
of multiple pulses generated at the out-
put of comparator N4, even with a single
clap.]
The main control section is formed
around IC5 (74C192 or CD40192), which
is a 4-bit up/down presetable decade
counter. 74C192/CD40192 is a CMOS ver-
sion of 74192. Here, one can even use
74C193/CD40193, a 4-bit up/down binary
counter, since counting up to decimal digit
8 only is involved. The above-mentioned
ICs are pin-to-pin compatible.
The other ICs used in the control sec-
tion are IC3 (dual JK flip-flop) and IC4
(NE555 timer, configured as monostable
flip-flop). When power is applied to the
circuit, IC3, IC4, and IC5 are reset by
power-on reset circuits comprising capaci-
tor-resistor combinations of C14-R19, C11-
R16, and C15-R21 respectively. Thus, all
outputs of IC5 (Q
A
to Q
D
) are at logic zero.
Hence, all the parallel load inputs (A
through D) of IC5 are also at logic zero.
The Q outputs of IC3 are ‘low’ while its Q
outputs are ‘high’. The CLK2 input of IC3
is initially ‘high’ because transistor T1 is
in conduction state.
Now, when a clap sound is produced,
IC5 gets a low-to-high going clock pulse.
Its count goes up from 0000 to 0001, i.e.
it is incremented by one digit. Since Q
A
TABLE I
Q
D
Q
C
Q
B
Q
A
Switch/Device status
0 0 0 0 Device remains ‘off’ in this
0 0 0 1 region as Q
C
remains at
0 0 1 0 logic low
0011
0 1 0 0 Device remains ‘on’ in this
0 1 0 1 region as Q
C
remains at
0 1 1 0 logic high
0111
1 0 0 0 Device is reset to off state
(unstable state)
RUPANJANA
PARTS LIST
Semiconductors:
IC1 - LM324 quad op-amp
IC2 - 7812 +12V regulator
IC3 - CD4027 dual JK flip-flop
IC4, IC6 - NE555 timer
IC5 - 74C192 up/down decade
counter
D1, D9 - Colour LED
D2-D4, D8 - 1N4007 rectifier diode
D5-D7 - 1N4148 switching diode
T1, T2 - 2N2907 pnp transistor
T3 - 2N2222 npn transistor
Resistors (all ¼W, ±5% metal carbon film,
unless stated otherwise)
R1, R15, R26 - 10-kilo-ohm
R2, R3, R18,
R19, R21 - 100-kilo-ohm
R4, R7, R9,
R13, R14, R16
R20, R22, R23 - 1-kilo-ohm
R5, R6 - 5.6-kilo-ohm
R8, R24 - 22-kilo-ohm
R10 - 220-ohm
R11 - 4.7-kilo-ohm
R12 - 680-ohm
R17 - 33-kilo-ohm
R25 - 470-ohm
VR1 - 10-kilo-ohm preset
Capacitors:
C1 - 47nF ceramic disk
C2, C3 - 4.7µF, 25V electrolytic
C4, C6-C8, C12,
C18 - 0.01µF ceramic disk
C5, C10, C13 - 100µF, 25V electrolytic
C9 - 2200µF, 25V electrolytic
C11, C17 - 10µF, 25V electrolytic
C14, C15, C16 - 0.1µF ceramic disk
Miscellaneous:
RL1 - 12V, 200-ohm relay
MIC1 - Condenser microphone
X1 - 230V AC primary to 15V-
0-15V, 1A secondary
transformer
- Heat-sink
F1, F2 - 1A fuse
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