Specifications
CONSTRUCTION
003F 01 DB 01H
0040 11 DB 11H
0041 22 DB 22H
0042 44 DB 44H
0043 88 DB 88H
0044 44 DB 44H
0045 22 DB 22H
0046 11 DB 11H
0047 33 DB 33H
0048 77 DB 77H
0049 FF DB FFH
004A 77 DB 77H
004B 33 DB 33H
004C 11 DB 11H
004D 81 DB 81H
004E 42 DB 42H
004F 24 DB 24H
0050 18 DB 18H
0051 24 DB 24H
0052 42 DB 42H
0053 81 DB 81H
0054 C3 DB C3H
0055 E7 DB E7H
0056 FF DB FFH
0057 E7 DB E7H
0058 C3 DB C3H
0059 81 DB 81H
005A 01 DB 01H
005B 02 DB 02H
005C 04 DB 04H
005D 08 DB 08H
005E 10 DB 10H
005F 20 DB 20H
0060 40 DB 40H
0061 80 DB 80H
0062 40 DB 40H
0063 20 DB 20H
0064 10 DB 10H
0065 08 DB 08H
0066 04 DB 04H
0067 02 DB 02H
0068 01 DB 01H
0069 03 DB 03H
006A 0C DB 0CH
006B 30 DB 30H
006C C0 DB C0H
006D 30 DB 30H
006E 0C DB 0CH
006F 03 DB 03H
0070 0F DB 0FH
0071 F0 DB F0H
0072 FF DB FFH
0073 00 DB 00H
0074 FF DB FFH
0075 00 DB 00H
0076 FF DB FFH
0077 AA DB AAH
0078 55 DB 55H
0079 AA DB AAH
007A 55 DB 55H
007B AA DB AAH
007C 55 DB 55H
Add. Code Label Mnemonics Comments
ORG 0000H ;ROM starting address
0000 E4 CLR A ;Clear contents of accumulator
0001 759000 MOV P1,#00H ;Clear port 1 (off all LEDs)
0004 900023 MOV DPTR,#0023H ;Moving immediate DPTR
;with 0023 (starting address of
;O/P codes)
0007 7B00 LABEL2: MOV R3,#00H ;Clearing the contents of
register R3
0009 E4 LABEL1: CLR A ;Clear accumulator
000A 2B ADD A,R3 ;Adding the contents of
;accumulator and register R3
000B 0B INC R3 ;Incrementing the contents of
;register R3 by 1
000C 93 MOVC A,@A+DPTR ;Copy the code byte, found at
;ROM address formed by adding
;A dn the DPTR, to A
000D F590 MOV P1,A ;Move the content the contents
;of accumulator to port 1
000F 1116 ACALL DELAY ;Calling delay
0011 BB59F5 CJNE R3,#59H, ;compare the contents of regis-
LABEL1 ;ter R3 with 59H and jump to
;labell if not equal else continue
0014 80F1 SJMP LABEL2 ;Short jump to label2
0016 7801 DELAY: MOV R0,#01H ;Move immediate register R0
;with 01H
0018 7900 LABEL5:MOV R1,#00H ;Move immediate register R1
;with 00H
001A 7A00 LABEL4:MOV R2,#00 ;Move immediate register R2
;with 00H
001C DAFE LABEL3:DJNZ R2,LABEL3 ;Decrement the content of
;register R2 till it becomes zero
001E D9FA DJNZ R1,LABEL4 ;Decrement R1 till zero
0020 D8F6 DJNZ R0,LABEL5 ;Decrement R0 till zero
0022 22 RET ;Return
0023 01 DB 01H ;DB(Define Byte) is
0024 02 DB 02H ;the assembler directive
0025 04 DB 04H
0026 08 DB 08H
0027 10 DB 10H
0028 20 DB 20H
0029 40 DB 40H
002A 80 DB 80H
002B 40 DB 40H
002C 20 DB 20H
002D 10 DB 10H
002E 08 DB 08H
002F 04 DB 04H
0030 02 DB 02H
0031 01 DB 01H
0032 03 DB 03H
0033 07 DB 07H
0034 0F DB 0FH
0035 1F DB 1FH
0036 3F DB 3FH
0037 7F DB 7FH
0038 FF DB FFH
0039 7F DB 7FH
003A 3F DB 3FH
003B 1F DB 1FH
003C 0F DB 0FH
003D 07 DB 07H
003E 03 DB 03H
Add. Code Label Mnemonics Comments
normal hex level, you have to apply 8421
logic (Fig. 6) and you get 01H.
Example 2: To set P1.0 and P1.7,
you have to output 81H from port P1
(Fig. 7).
In the software program, total codes
to be displayed are 007CH–0023H =
0059H, as mentioned earlier, and hence
59H is loaded in the main program at
memory location 0012H. Further, reg-
ister R3 being an 8-bit register, the
maximum count is restricted to FFH
(255 decimal). Since we are comparing
the contents of register R3 with 59H,
when register R3 reaches that count,
the compare instruction gets satisfied
and it jumps to label 2 (in the program).
In case you wish to extend the codes to
be output from port P1, the loaded count
at memory location 0012H has to be al-
tered correspondingly. The program,
when run, produces an eye-catching
lighting effect. The complete program
listing is given in the box above.
An actual-size, single-sided PCB for
the circuit in Fig. 1 is shown in Fig. 2
and its component layout is shown in
Fig. 3. It is important that neutral and
phase (live) lines of 230V AC are not
interchanged, because only the neutral
line is required to be grounded to PCB
common ground and not the live line.
❏
Program Listing For Multi-effect Chaser Lights
184