Specifications

CONSTRUCTION
lighting of LED1 via Schmitt NAND gates
N7, N5, and N6 to provide audio-visual
indication to the effect that the data cor-
responding to the pressed key has been
generated for further processing.
Auto-reset circuit. IC9 (74LS32) is a
quad 2-input OR-
gate chip, of which
only one gate is
used here. This gate
is wired as a reset
circuit (both for
auto and manual
reset operation) for
IC8 and IC6. One
can reset both the
counters (IC6 and
IC8) manually, by
pressing reset
switch S3.
Auto-reset func-
tion will take place
whenever preset
number of digits of
secret code has
been entered, either
for verification/op-
eration or for regis-
tration. In verifica-
tion mode, the se-
cret code would ei-
ther be right or
wrong. Basically,
the auto-reset func-
tion keeps the se-
cret code really se-
cret, and is smart
enough to confuse
an intruder.
Operational
mode control
circuitry
The R1-C1 combi-
nation around mode
switch S1 functions
as a bounce elimi-
nator. Switch S1 is
a secret code verifi-
cation and registra-
tion mode selector
switch.
Register mode.
When switch S1
is kept in register
mode, logic ‘0’
output of gate N4
enables second
section of octal 3-
state buffer IC2
(74HC244) via pin
19 (OE2). At the same time, OE and WE
pins of RAM are taken to logic 1 and logic
0 states, respectively, to enable writing
Fig. 1: Schematic diagram of versatile digital code lock
147