Specifications

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CONSTRUCTION

210B D383 OUT 83H 74373s. (no data would move to O/Ps)

210D 7E MOV A,M Moves the 1st char. Of the data

pointed, to the accumulator (mem.

address given by

210E D382 OUT 82H calling program)

2110 78 MOV A,B By moving out reg.B data throgh port

2111 D383 OUT 83H a specific latch is enabled.

2113 1F RAR Logic 1 of counter data moves right 1

bit

2114 FE00 CPI 00H Checks to see logic 1 moves out from

acc.

2116 CA2121 JZ 2121H (All 4 data digits latched)to return to

the calling program.

2119 47 MOV B,A Else stores back new counter data to B

reg.

211A CD3320 CALL DELAY

211D 23 INX H Memory pointer incremented by 1

211E C30921 JMP 2109H Jumps to the next character from the

table

2121 C9 RET Returns to the calling program

;Error Sub-routine

21A0 219121 ERR: LXI H,2191H Points to the message “Adj.” in memory

21A3 CDFC20 CALL DISPLAY Calls the display routine to display the

same

21A6 CD3320 CALL DELAY Waits

21A9 CD3320 CALL DELAY Waits

21AC 219621 LXI H,2196H Points to the message “LEAd” in

memory

21AF CDFC20 BAD: CALL DISPLAY Calls the display routine to display

21B2 C30020 JMP MAIN Jumps back to start

21B5 00 NOP No operation

21B6 218D21 ER: LXI H,218DH Points to message “bAd” in the data

table

21B9 C3AF21 JMP BAD Jumps to display the message

Data table:

Addr. Data Display Addr. Data Display Addr. Data Display

2160 37 P 2179 C7 b 2189 37 P

2161 45 n 217A 93 C 218A E3 U

2162 37 P 217B 97 E 218B D6 S

2163 00 217C 00 218C 67 H

2164 45 n 217D C7 b 218D C7 b

2165 37 P 217E 97 E 218E 77 A

2166 45 n 217F 93 C 218F E5 d

2167 00 2180 00 2190 00

216A Base-id (store) 2181 97 E 2191 7 a

216B Emitter-id (store) 2182 93 C 2192 E5 d

216C Collector-id (store) 2183 C7 b 2193 E1 J

2171 93 C 2184 00 2194 00

2172 C7 b 2185 93 C 2196 83 L

2173 97 E 2186 97 E 2197 97 E

2174 00 2187 C7 b 2198 77 A

2175 97 E 2188 00 2199 E5 D

2176 C7 b 219A 00

2177 93 C

2178 00

Address of routines/labels:

MAIN 2000 P 202A DELAY 2033 D 2036

P2 203D P3 2068 P4 2092 M 20B4

P4A 20BA E 20CA P4B 20D0 B 20E0

P4C 20E6 C 20F6 DISPLAY 20FC ERR 21A0

BAD 21AF ER 21B6

Notes:

1. During Base identification, if the data found has odd parity, only then the program

jumps to this routine (starting at 2068 at P3:) for collector identification. A single logic-1

denotes a good transistor, whereas three logic-1 (i.e. Base-Id = 07) denote a bad transistor

with shorted leads. Hence the program jumps to error processing routine to display the

message “bAd”.

2. The purpose of sending the Base-Id number to the interface through Port-C, is to

insert a resistor in series with the Base (as indicated in the principle above). The logic-1(s) of

the Base-Id, set the switches connected with the collector and emitter leads to “ON”, and that

with the base to “OFF”. The result is, the resistor already present in the base circuit (10K,

47K or 100K which one is applicable), becomes active. To achieve this result, the Base-Id

found for an NPN device is to be inverted first.

;Display subroutine used by EFY using monitor program of Vinytics kit.

20FC C5 DISPLAY: PUSH B

20FD 3E00 MVI A,0H

20FF 0600 MVI B,0H

2101 7E MOV A,M

2102 CDD005 CALL 05D0H

2105 C1 POP B

2106 C9 RET

Address Op Code Label Mnemonic Comments Addr. Data Display Addr. Data Display Addr. Data Display

TABLE VII

; Modification to Collector Identification Program for pnp Transistors

Address Op Code Label Mnemonic Comments

203D 216021 P2: LXI H,2160H Points to message ‘PnP’in data table

2040 CDFC20 CALL DISPLAY Displays the message

2043 216A21 LXI H,216AH Points to Base-Id in data table

2046 7E MOV A,M Extract the number to the accumulator

2047 D383 OUT 83H Send number via port C to interface

TABLE VIII

; Modification to Collector Identification Program for npn Transistors

Address Op Code Label Mnemonic Comments

2068 216421 P3: LXI H,2164H Points to the message ‘nPn’

206B CDFC20 CALL DISPLAY Displays the same on display.

206E 216A21 LXI H,216AH Points to Base-Id in DATA table

2071 7E MOV A,M Extract the number to the accumulator

2072 FE07 CPI 07H Refer note.1 (see original program.)

2074 CAB621 JZ ER Jumps to error processing routine

2077 EE0F XRI 0FH Refer note.2 (see original program.)

2079 D383 OUT 83H Send number to interface (via port C)

ing operation is done after first moving

the data from the register to the accumu-

lator, and then storing the result back

into the register once again if the zero

flag is not set by the

RAR

operation.

Now, with the reg.

content = 0000 0001,

one more shifting of the bits towards right

would make the accumulator content =

0000 0000, which would set the zero

flag. And hence the program would jump

back to the calling one. It would be inter-

esting to note the same reg.

content (a

binary number comprising a logic 1) is

sent through port

to enable the particu-

lar latch.

Since the base Id numbers and the

code to enable a specific latch are sent

through the same port (port

) in the

alternate display, the base Id must be

sent first for displaying the message

n. Therefore changes or modifications

are required in the original program per-

taining to collector identification program

for pnp transistors (at locations

203

through 2048) and npn transistors (at lo-

cations

2068 through 207

) as given in

Tables VII and VIII respectively.

Software flow charts. Software flow

charts for main program and various sub-

routines are shown in Fig. 5.

PCB

and parts list are included only

for the main interface diagram of Fig. 1.

The actual-size, single-sided

PCB

for the

same is given in Fig. 6 while its compo-

nent layout is shown in Fig. 7.

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