Specifications
CONSTRUCTION
PARTS LIST
Semiconductors:
IC1 - NE555, timer
IC3 - CD4017, decade counter-de-
coder
IC3 - 7486, quad EX-OR gates
IC4,IC6,IC7 - MCT2E, optocoupler
IC5 - CD4066, quad bilateral switch
IC8 - LM7805, 3-terminal +5V
regulator
T1,T2,T3 - BC147, npn transistor
D1,D3,D5 - 1N34, point contact diode
D2,D4,D6 - LED, 5mm
D7,D8 - 1N4002, rectifier diode
Resistors (All ¼ watt +/- 5% metal/carbon film
unless stated otherwise)
R1,R9,R10,R14,
R15,R19,R20 - 1 kilo-ohm
R2 - 33 kilo-ohm
R5 - 47 kilo-ohm
R4,R11,R16,R21 - 10 kilo-ohm
R3,R6,R7,R12,R17 - 100 kilo-ohm
R8,R13,R18 - 680 ohm
Capacitors:
C1 - 0.5µF polyster
C2 - 0.1µF polyster
C3-C5 - 220µF/12V electrolytic
C6 - 0.22µF polyster
C7 - 1000µF/12V electrolytic
Miscellaneous:
X1 - 230V/9V-0-9V, 250mA power
transformer
Fig. 6: Actual-size, single-sided PCB layout for the circuit in Fig. 1
Fig. 7: Component layout for the PCB
The Display. The display procedure
described in this article is based on
IC
8279 (programmable keyboard/display in-
terface) which is used in the microproces-
sor kit. The unique feature of the
8279-
based display system is that, it can run
on its own. You just have to dump the
data to be displayed on its internal
RAM
,
and your duty is over.
8279 extracts this
data from its
RAM
and goes on displaying
the same without taking any help or con-
suming the time of the microprocessor in
the kit.
Unfortunately, not all the micropro-
cessor kits present in the market are fit-
ted with this
IC
. Instead, some of them
use a soft-scan method for display pur-
pose. Hence, the stated procedure cannot
be run in those kits. Of course, if the
monitor program of the kit is to be used,
which may have an in-built display rou-
tine to display the content of four spe-
cific memory locations—all at a time, the
same may be used in place of the present
display procedure.
Note: Display subroutine at address
20
FC
used at
EFY
, making use of the moni-
tor program of the Vinytics 8085 kit, dur-
ing program testing, is listed towards the
end of the software program given by the
author. To make use of the author’s dis-
play subroutine, please change the code
against ‘
CALL
DISPLAY
’ instruction (code
CDFC
20) everywhere in the program to
code
CD
40 21 for 8279 based display or
code
CD
07 21 for alternate display referred
in the next paragraph.
Alternatively, one can construct a spe-
cial display system using four octal
D
-
type latches
(74373) and four seven-seg-
ment
LED
displays (
LT
543). Only one latch
and one display has been shown in the
schematic circuit of Fig. 4 along with its
interface lines from
8155 or 8255 of the
kit. To drive this display, a special soft-
scan method explained in the following
para has to be used.
The soft scan display procedure.
The procedure extracts the first data to
be displayed from memory. The start
memory address of the data to be dis-
played is to be supplied by the calling
program. This data (8-bit) is output from
port
B
of 8155/8255
PPI
(after proper coding
for driving the seven-segment displays),
used in the kit. Data lines are connected
in parallel to all the octal latches. But
only one of the four latches is enabled
(via a specific data bit of port
C
of 8155/
8255
) to receive the data and transfer the
same to its output to drive the correspond-
ing seven-segment
LED
display. To enable
a particular latch, a logic 1 is sent through
a particular bit of port
C
(bit 4 here, for
the first data) by the software. Subse-
quently, logic 0 is sent through that bit
to latch the data transferred. The pro-
gram then jumps to seek the second data
from memory, and sends the same
through port
B
as before. However, in this
case logic 1 is sent through bit 3 of port
C
, to latch the data to the second seven-
segment
LED
display, and so on.
Register
B
of 8085 is used as a counter,
and is initially stored with the binary
number
00001000 (08H). Each time a data is
latched, the logic 1 is shifted right by one
place. So, after the fourth data is latched,
the reg.
B
content would be 0000 0001. Shift-
11