Specifications
Manuals
Brands
Casio Manuals
PDA
E-105
41
42
43
44
45
46
47
48
49
50
— 47 —
1
1.
SCHEMA
TIC DIAGRAMS
1
1-1.
Main Block (1/3)
Gate Arra
y
CPU
Gate Arra
y
E-100 :
DRAM1 and DRAM2 only
DRAM3 and DRAM4 are not used.
*
1
...
...
47
48
49
50
51
...
...
70
