Specifications

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9-3. Function

Refer to the 9-1. Block Diagram, 9-2. Power Supply and 11. SCHEMATIC DIAGRAMS.

Boot Sequence at the time of setting Rechargeable Battery

Setting Battery

V3SYS

Stabilization of oscillation

32KHz OSC.

≤1 sec.

ACLB

Of course, if one of these three factors don’t start to boot, the unit don’t work.

Boot Sequence at the time of turning power on

Turning power on

MPOWERB

18.432MHz OSC.

Stabilization of oscillation

Fetch Cycle to ROM

POP

(for 2ch DC-DC Con.)

P5LCD

(for Voltage REG)

PLCDB

(for V3LCD)

PDMMYM

(Dummy for Recharge. Battery)

PDMMYS

(Dummy for Back-up Battery)

PTFT1

PTFT2

PTFT3

RAM CHECK...... etc.

After Fetch Cycle for ROM cord starts, it is possible to drive software of this unit.

But, if RAM CHECK don’t finished, the unit don’t work.

- Interior Circuits of CORE of CPU work by high-speed frequency 131.1MHz.

- IrDA Module HSDL3600 (Quotation from DATA Book by

)

This module is a low-profile infrared transceiver module that provides interface between logic and IR signals

for through-air, serial, half-duplex IR data link.

The module is compliant to IrDA Data Physical Layer Specifications 1.1 and IEC825-Class 1 Eye Safe.

Receive signal rate: 2.4 kb/s~4Mb/s (In case of E-100/ -105: Normal/ MIR→115.2kb/s FIR→1.25Mb/s)

Oscillation of 48MHz is for Test with FIR, and stops when transmission with Normal/ MIR is performed.

Start

3.72 sec.

Waiting for turning power on