Specifications

X723-300151 3-3 Issue 2
The following options will be presented whilst configuring each mode of
operation for the Dual LIU, to enable the TS0 routing options to be
selected. The preceding display will depend upon the LIU mode selected.
1 Normal
2 Normal plus Remote Alarm
3 L1 to TS0
4 L2 to TS0
5 L1 to TS0, L2 to TS1
6 L1 to TS0 (DT585)
7 L2 to TS0 (DT585)
8 L1 to TS0 (DT585) , L2 to TS1 (DT585)
TS0 mode 1 >
3.1.2 Clock Recovery and Selection
A recovered 2048kHz clock is available from each of the received PCM
lines and a 2048kHz external clock signal input socket is provided. Any of
these clock sources may be selected by the system controller as the system
clock, and are monitored by the system controller only if they are allocated
in the clock priority list.
3.1.3 Jitter Attenuation
Jitter attenuators are used on the PCM and clock inputs to reduce jitter
on the recovered signals. This improves jitter transfer of the system if the
clock is selected as the system timing source. A two frame input buffer is
provided on each PCM line input.
3.1.4 Frame Structure
The framing structure complies with CCITT G.704 and the card supports
Channel Associated Signalling (CAS) or can be used in 31 timeslot mode
transparent to Common Channel Signalling (CCS). The signalling mode
for each of the two PCM interfaces may be selected independently.