Specifications

BASIC Stamp II
Parallax, Inc. • BASIC Stamp Programming Manual 1.8 • Page 333
2
ters—trains of flip-flops that pass data bits along in a bucket-brigade
fashion to a single data-output pin. Another bit is input each time the
appropriate edge (rising or falling, depending on the device) appears
on the clock line. BS2 application note #2 explains shift-register opera-
tion in detail.
A single Shiftout instruction causes the following sequence of events:
Makes the clock pin (cpin) output low.
Copies the state of the next data bit to be output (working from one
end of the data to the other) to the dpin output latch (corresponding
bit of the OUTS variable).
Makes the data pin (dpin) an output.
Pulses the clock pin high for 14µs.
Repeats the sequence of outputting data bits and pulsing the clock
pin until the specified number of bits is shifted into the variable.
Making Shiftout work with a par-
ticular device is a matter of match-
ing the mode and number of bits
to that device’s protocol. Most
manufacturers use a timing dia-
gram to illustrate the relationship
of clock and data. Figure I-26 shows
Shiftout’s timing, beginning at the
moment the Shiftout instruction
first executes. Timing values in
the figure are rounded to the near-
est microsecond.
Demo Program
See listing 1 of BS2 application note #2 Using Shiftin and Shiftout.
Shiftout Timing Diagram
14µs
Clock
(cpin)
Data
(dpin)
–46µs–
shiftout begins,
makes cpin
output low
15µs
15µs
30µs
=previous state of pin (unknown)
Figure I-26