Specifications

BASIC Stamp II
Parallax, Inc. • BASIC Stamp Programming Manual 1.8 • Page 209
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When a pin is an output, it is internally connected to ground or +5V
through a very efficient CMOS switch. If it is lightly loaded (< 1mA),
the output voltage will be within a few millivolts of the power supply
rail (ground for 0; +5V for 1). Pins can sink as much as 25mA (output-
ting 0) and source up to 20 mA (outputting 1). Each of the two eight-
pin ports should not carry more than a total of 50mA (sink) or 40mA
(source). Pins P0 through P7 make up one port; P8 through P15 the
other.
2048-byte Erasable Memory Chip (U2)
U1 is permanently programmed at the factory and cannot be repro-
grammed, so your PBASIC2 programs must be stored elsewhere. That’s
the purpose of U2, the 24LC16B electrically erasable, programmable
read-only memory (EEPROM). EEPROM is a good medium for pro-
gram storage because it retains data without power, but can be repro-
grammed easily.
EEPROMs have two limitations: (1) They take a relatively long time
(as much as several milliseconds) to write data into memory, and (2)
There is a limit to the number of writes (approximately 10 million)
they will accept before wearing out. Because the primary purpose of
the BS2’s EEPROM is program storage, neither of these is normally a
problem. It would take many lifetimes to write and download 10 mil-
lion PBASIC2 programs! However, when you use the PBASIC2 Write
instruction to store data in EEPROM space be sure to bear these limita-
tions in mind.
Reset Circuit (U3)
When you first power up the BS2, it takes a fraction of a second for the
supply to reach operating voltage. During operation, weak batteries,
varying input voltages or heavy loads may cause the supply voltage to
wander out of acceptable operating range. When this happens, nor-
mally infallible processor and memory chips (U1 and U2) can make
mistakes or lock up. To prevent this, U1 must be stopped and reset
until the supply stabilizes. That is the job of U3, the S-8045HN reset
circuit. When the supply voltage is below 4V, U3 puts a logic low on
U1’s master-clear reset (MCLR) input. This stops U1 and causes all of
its I/O lines to electrically disconnect. In reset, U1 is dormant; alive
but inert.